]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
qualcommax: ipq60xx: mark gcc_xo_clk_src as CLK_IS_CRITICAL
authorJohn Crispin <john@phrozen.org>
Thu, 5 Mar 2026 13:24:30 +0000 (14:24 +0100)
committerRobert Marko <robimarko@gmail.com>
Fri, 27 Mar 2026 15:05:21 +0000 (16:05 +0100)
The XO clock source is always-on in hardware and cannot be gated.
Without CLK_IS_CRITICAL, the CMN PLL runtime PM suspend cascades a
disable up to gcc_xo_clk_src, causing a branch status timeout warning.
The IPQ8074 GCC driver already marks this clock as critical.

Signed-off-by: John Crispin <john@phrozen.org>
target/linux/qualcommax/patches-6.12/0917-clk-qcom-gcc-ipq6018-mark-gcc_xo_clk_src-as-critical.patch [new file with mode: 0644]

diff --git a/target/linux/qualcommax/patches-6.12/0917-clk-qcom-gcc-ipq6018-mark-gcc_xo_clk_src-as-critical.patch b/target/linux/qualcommax/patches-6.12/0917-clk-qcom-gcc-ipq6018-mark-gcc_xo_clk_src-as-critical.patch
new file mode 100644 (file)
index 0000000..1844803
--- /dev/null
@@ -0,0 +1,28 @@
+From: John Crispin <john@phrozen.org>
+Date: Wed, 05 Mar 2026 12:00:00 +0100
+Subject: clk: qcom: gcc-ipq6018: mark gcc_xo_clk_src as critical
+
+The XO clock source is always-on in hardware and cannot be gated.
+Without CLK_IS_CRITICAL, runtime PM of downstream consumers (such as
+the CMN PLL driver) cascades a disable up to gcc_xo_clk_src, causing
+a branch status timeout warning.
+
+The IPQ8074 GCC driver already marks this clock as CLK_IS_CRITICAL.
+Apply the same fix to IPQ6018.
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ drivers/clk/qcom/gcc-ipq6018.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/gcc-ipq6018.c
++++ b/drivers/clk/qcom/gcc-ipq6018.c
+@@ -400,7 +400,7 @@ static struct clk_branch gcc_xo_clk_src
+                               .fw_name = "xo",
+                       },
+                       .num_parents = 1,
+-                      .flags = CLK_SET_RATE_PARENT,
++                      .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
+                       .ops = &clk_branch2_ops,
+               },
+       },