]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
phy: qcom-qmp: Add missing QSERDES COM v2 registers
authorShawn Guo <shengchao.guo@oss.qualcomm.com>
Sat, 14 Mar 2026 05:13:20 +0000 (13:13 +0800)
committerVinod Koul <vkoul@kernel.org>
Sun, 10 May 2026 11:25:29 +0000 (16:55 +0530)
A few registers that could be used by phy-qcom-qmp drivers are missing
from qserdes-com-v2 header.  Add them.

Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20260314051325.198137-2-shengchao.guo@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v2.h

index 3ea1884f35dd50a0bde9b213f193ac8ac6b77612..cb599c113189c495fe19c50c36be58f0835020e8 100644 (file)
@@ -34,6 +34,7 @@
 #define QSERDES_V2_COM_LOCK_CMP3_MODE1                 0x060
 #define QSERDES_V2_COM_EP_CLOCK_DETECT_CTR             0x068
 #define QSERDES_V2_COM_SYSCLK_DET_COMP_STATUS          0x06c
+#define QSERDES_V2_COM_BG_TRIM                         0x070
 #define QSERDES_V2_COM_CLK_EP_DIV                      0x074
 #define QSERDES_V2_COM_CP_CTRL_MODE0                   0x078
 #define QSERDES_V2_COM_CP_CTRL_MODE1                   0x07c
@@ -47,6 +48,7 @@
 #define QSERDES_V2_COM_CML_SYSCLK_SEL                  0x0b0
 #define QSERDES_V2_COM_RESETSM_CNTRL                   0x0b4
 #define QSERDES_V2_COM_RESETSM_CNTRL2                  0x0b8
+#define QSERDES_V2_COM_RESCODE_DIV_NUM                 0x0c4
 #define QSERDES_V2_COM_LOCK_CMP_EN                     0x0c8
 #define QSERDES_V2_COM_LOCK_CMP_CFG                    0x0cc
 #define QSERDES_V2_COM_DEC_START_MODE0                 0x0d0
@@ -83,6 +85,7 @@
 #define QSERDES_V2_COM_RESTRIM_CODE_STATUS             0x164
 #define QSERDES_V2_COM_PLLCAL_CODE1_STATUS             0x168
 #define QSERDES_V2_COM_PLLCAL_CODE2_STATUS             0x16c
+#define QSERDES_V2_COM_BG_CTRL                         0x170
 #define QSERDES_V2_COM_CLK_SELECT                      0x174
 #define QSERDES_V2_COM_HSCLK_SEL                       0x178
 #define QSERDES_V2_COM_INTEGLOOP_BINCODE_STATUS                0x17c