(match_operand:SVE_F 3 "aarch64_simd_reg_or_zero")]
UNSPEC_SEL))]
"TARGET_SVE && !rtx_equal_p (operands[2], operands[3])"
- {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ]
- [ &w , Upl , w , 0 ; * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ]
+ [ &w , Upl , w , 0 ; * , * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ &w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_fp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>
+ [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
}
"&& !rtx_equal_p (operands[1], operands[4])"
{
(match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero")]
UNSPEC_SEL))]
"TARGET_SVE && !rtx_equal_p (operands[2], operands[3])"
- {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ]
- [ &w , Upl , w , 0 ; * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ]
+ [ &w , Upl , w , 0 ; * , * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ &w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_fp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>
+ [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
}
[(set_attr "sve_type" "sve_<sve_type_unspec>")]
)
(match_operand:<V_INT_EQUIV> 3 "aarch64_simd_reg_or_zero")]
UNSPEC_SEL))]
"TARGET_SVE2 && !rtx_equal_p (operands[2], operands[3])"
- {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ]
- [ &w , Upl , w , 0 ; * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ]
+ [ &w , Upl , w , 0 ; * , * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ &w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_fp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>
+ [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
}
"&& !rtx_equal_p (operands[1], operands[4])"
{
(match_operand:<V_INT_EQUIV> 3 "aarch64_simd_reg_or_zero")]
UNSPEC_SEL))]
"TARGET_SVE2 && !rtx_equal_p (operands[2], operands[3])"
- {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ]
- [ &w , Upl , w , 0 ; * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ]
+ [ &w , Upl , w , 0 ; * , * ] <sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ &w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_fp_op>\t%0.<Vetype>, %1/z, %2.<Vetype>
+ [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_fp_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
}
[(set_attr "sve_type" "sve_fp_log")]
)
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** abs_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fabs z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (abs_f16_z_tied1, svfloat16_t,
+ z0 = svabs_f16_z (p0, z0),
+ z0 = svabs_z (p0, z0))
+
+/*
+** abs_f16_z_untied:
+** fabs z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (abs_f16_z_untied, svfloat16_t,
+ z0 = svabs_f16_z (p0, z1),
+ z0 = svabs_z (p0, z1))
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** abs_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fabs z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (abs_f32_z_tied1, svfloat32_t,
+ z0 = svabs_f32_z (p0, z0),
+ z0 = svabs_z (p0, z0))
+
+/*
+** abs_f32_z_untied:
+** fabs z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (abs_f32_z_untied, svfloat32_t,
+ z0 = svabs_f32_z (p0, z1),
+ z0 = svabs_z (p0, z1))
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** abs_f64_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fabs z0\.d, p0/z, \1\.d
+** ret
+*/
+TEST_UNIFORM_Z (abs_f64_z_tied1, svfloat64_t,
+ z0 = svabs_f64_z (p0, z0),
+ z0 = svabs_z (p0, z0))
+
+/*
+** abs_f64_z_untied:
+** fabs z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (abs_f64_z_untied, svfloat64_t,
+ z0 = svabs_f64_z (p0, z1),
+ z0 = svabs_z (p0, z1))
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** logb_f16_z:
+** flogb z0\.h, p0/z, z4\.h
+** ret
+*/
+TEST_DUAL_Z (logb_f16_z, svint16_t, svfloat16_t,
+ z0 = svlogb_f16_z (p0, z4),
+ z0 = svlogb_z (p0, z4))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** logb_f32_z:
+** flogb z0\.s, p0/z, z4\.s
+** ret
+*/
+TEST_DUAL_Z (logb_f32_z, svint32_t, svfloat32_t,
+ z0 = svlogb_f32_z (p0, z4),
+ z0 = svlogb_z (p0, z4))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** logb_f64_z:
+** flogb z0\.d, p0/z, z4\.d
+** ret
+*/
+TEST_DUAL_Z (logb_f64_z, svint64_t, svfloat64_t,
+ z0 = svlogb_f64_z (p0, z4),
+ z0 = svlogb_z (p0, z4))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** neg_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fneg z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (neg_f16_z_tied1, svfloat16_t,
+ z0 = svneg_f16_z (p0, z0),
+ z0 = svneg_z (p0, z0))
+
+/*
+** neg_f16_z_untied:
+** fneg z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (neg_f16_z_untied, svfloat16_t,
+ z0 = svneg_f16_z (p0, z1),
+ z0 = svneg_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** neg_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fneg z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (neg_f32_z_tied1, svfloat32_t,
+ z0 = svneg_f32_z (p0, z0),
+ z0 = svneg_z (p0, z0))
+
+/*
+** neg_f32_z_untied:
+** fneg z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (neg_f32_z_untied, svfloat32_t,
+ z0 = svneg_f32_z (p0, z1),
+ z0 = svneg_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** neg_f64_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fneg z0\.d, p0/z, \1\.d
+** ret
+*/
+TEST_UNIFORM_Z (neg_f64_z_tied1, svfloat64_t,
+ z0 = svneg_f64_z (p0, z0),
+ z0 = svneg_z (p0, z0))
+
+/*
+** neg_f64_z_untied:
+** fneg z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (neg_f64_z_untied, svfloat64_t,
+ z0 = svneg_f64_z (p0, z1),
+ z0 = svneg_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** recpx_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frecpx z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (recpx_f16_z_tied1, svfloat16_t,
+ z0 = svrecpx_f16_z (p0, z0),
+ z0 = svrecpx_z (p0, z0))
+
+/*
+** recpx_f16_z_untied:
+** frecpx z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (recpx_f16_z_untied, svfloat16_t,
+ z0 = svrecpx_f16_z (p0, z1),
+ z0 = svrecpx_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** recpx_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frecpx z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (recpx_f32_z_tied1, svfloat32_t,
+ z0 = svrecpx_f32_z (p0, z0),
+ z0 = svrecpx_z (p0, z0))
+
+/*
+** recpx_f32_z_untied:
+** frecpx z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (recpx_f32_z_untied, svfloat32_t,
+ z0 = svrecpx_f32_z (p0, z1),
+ z0 = svrecpx_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** recpx_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frecpx z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (recpx_f64_z_tied1, svfloat64_t,
+ z0 = svrecpx_f64_z (p0, z0),
+ z0 = svrecpx_z (p0, z0))
+
+/*
+** recpx_f64_z_untied:
+** frecpx z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (recpx_f64_z_untied, svfloat64_t,
+ z0 = svrecpx_f64_z (p0, z1),
+ z0 = svrecpx_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rinta_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frinta z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rinta_f16_z_tied1, svfloat16_t,
+ z0 = svrinta_f16_z (p0, z0),
+ z0 = svrinta_z (p0, z0))
+
+/*
+** rinta_f16_z_untied:
+** frinta z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rinta_f16_z_untied, svfloat16_t,
+ z0 = svrinta_f16_z (p0, z1),
+ z0 = svrinta_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rinta_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frinta z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rinta_f32_z_tied1, svfloat32_t,
+ z0 = svrinta_f32_z (p0, z0),
+ z0 = svrinta_z (p0, z0))
+
+/*
+** rinta_f32_z_untied:
+** frinta z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rinta_f32_z_untied, svfloat32_t,
+ z0 = svrinta_f32_z (p0, z1),
+ z0 = svrinta_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rinta_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frinta z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rinta_f64_z_tied1, svfloat64_t,
+ z0 = svrinta_f64_z (p0, z0),
+ z0 = svrinta_z (p0, z0))
+
+/*
+** rinta_f64_z_untied:
+** frinta z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rinta_f64_z_untied, svfloat64_t,
+ z0 = svrinta_f64_z (p0, z1),
+ z0 = svrinta_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rinti_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frinti z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rinti_f16_z_tied1, svfloat16_t,
+ z0 = svrinti_f16_z (p0, z0),
+ z0 = svrinti_z (p0, z0))
+
+/*
+** rinti_f16_z_untied:
+** frinti z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rinti_f16_z_untied, svfloat16_t,
+ z0 = svrinti_f16_z (p0, z1),
+ z0 = svrinti_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rinti_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frinti z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rinti_f32_z_tied1, svfloat32_t,
+ z0 = svrinti_f32_z (p0, z0),
+ z0 = svrinti_z (p0, z0))
+
+/*
+** rinti_f32_z_untied:
+** frinti z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rinti_f32_z_untied, svfloat32_t,
+ z0 = svrinti_f32_z (p0, z1),
+ z0 = svrinti_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rinti_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frinti z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rinti_f64_z_tied1, svfloat64_t,
+ z0 = svrinti_f64_z (p0, z0),
+ z0 = svrinti_z (p0, z0))
+
+/*
+** rinti_f64_z_untied:
+** frinti z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rinti_f64_z_untied, svfloat64_t,
+ z0 = svrinti_f64_z (p0, z1),
+ z0 = svrinti_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintm_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintm z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintm_f16_z_tied1, svfloat16_t,
+ z0 = svrintm_f16_z (p0, z0),
+ z0 = svrintm_z (p0, z0))
+
+/*
+** rintm_f16_z_untied:
+** frintm z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintm_f16_z_untied, svfloat16_t,
+ z0 = svrintm_f16_z (p0, z1),
+ z0 = svrintm_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintm_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintm z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintm_f32_z_tied1, svfloat32_t,
+ z0 = svrintm_f32_z (p0, z0),
+ z0 = svrintm_z (p0, z0))
+
+/*
+** rintm_f32_z_untied:
+** frintm z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintm_f32_z_untied, svfloat32_t,
+ z0 = svrintm_f32_z (p0, z1),
+ z0 = svrintm_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintm_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frintm z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rintm_f64_z_tied1, svfloat64_t,
+ z0 = svrintm_f64_z (p0, z0),
+ z0 = svrintm_z (p0, z0))
+
+/*
+** rintm_f64_z_untied:
+** frintm z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rintm_f64_z_untied, svfloat64_t,
+ z0 = svrintm_f64_z (p0, z1),
+ z0 = svrintm_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintn_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintn z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintn_f16_z_tied1, svfloat16_t,
+ z0 = svrintn_f16_z (p0, z0),
+ z0 = svrintn_z (p0, z0))
+
+/*
+** rintn_f16_z_untied:
+** frintn z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintn_f16_z_untied, svfloat16_t,
+ z0 = svrintn_f16_z (p0, z1),
+ z0 = svrintn_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintn_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintn z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintn_f32_z_tied1, svfloat32_t,
+ z0 = svrintn_f32_z (p0, z0),
+ z0 = svrintn_z (p0, z0))
+
+/*
+** rintn_f32_z_untied:
+** frintn z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintn_f32_z_untied, svfloat32_t,
+ z0 = svrintn_f32_z (p0, z1),
+ z0 = svrintn_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintn_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frintn z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rintn_f64_z_tied1, svfloat64_t,
+ z0 = svrintn_f64_z (p0, z0),
+ z0 = svrintn_z (p0, z0))
+
+/*
+** rintn_f64_z_untied:
+** frintn z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rintn_f64_z_untied, svfloat64_t,
+ z0 = svrintn_f64_z (p0, z1),
+ z0 = svrintn_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintp_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintp z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintp_f16_z_tied1, svfloat16_t,
+ z0 = svrintp_f16_z (p0, z0),
+ z0 = svrintp_z (p0, z0))
+
+/*
+** rintp_f16_z_untied:
+** frintp z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintp_f16_z_untied, svfloat16_t,
+ z0 = svrintp_f16_z (p0, z1),
+ z0 = svrintp_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintp_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintp z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintp_f32_z_tied1, svfloat32_t,
+ z0 = svrintp_f32_z (p0, z0),
+ z0 = svrintp_z (p0, z0))
+
+/*
+** rintp_f32_z_untied:
+** frintp z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintp_f32_z_untied, svfloat32_t,
+ z0 = svrintp_f32_z (p0, z1),
+ z0 = svrintp_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintp_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frintp z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rintp_f64_z_tied1, svfloat64_t,
+ z0 = svrintp_f64_z (p0, z0),
+ z0 = svrintp_z (p0, z0))
+
+/*
+** rintp_f64_z_untied:
+** frintp z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rintp_f64_z_untied, svfloat64_t,
+ z0 = svrintp_f64_z (p0, z1),
+ z0 = svrintp_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintx_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintx z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintx_f16_z_tied1, svfloat16_t,
+ z0 = svrintx_f16_z (p0, z0),
+ z0 = svrintx_z (p0, z0))
+
+/*
+** rintx_f16_z_untied:
+** frintx z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintx_f16_z_untied, svfloat16_t,
+ z0 = svrintx_f16_z (p0, z1),
+ z0 = svrintx_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintx_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintx z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintx_f32_z_tied1, svfloat32_t,
+ z0 = svrintx_f32_z (p0, z0),
+ z0 = svrintx_z (p0, z0))
+
+/*
+** rintx_f32_z_untied:
+** frintx z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintx_f32_z_untied, svfloat32_t,
+ z0 = svrintx_f32_z (p0, z1),
+ z0 = svrintx_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintx_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frintx z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rintx_f64_z_tied1, svfloat64_t,
+ z0 = svrintx_f64_z (p0, z0),
+ z0 = svrintx_z (p0, z0))
+
+/*
+** rintx_f64_z_untied:
+** frintx z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rintx_f64_z_untied, svfloat64_t,
+ z0 = svrintx_f64_z (p0, z1),
+ z0 = svrintx_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintz_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintz z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintz_f16_z_tied1, svfloat16_t,
+ z0 = svrintz_f16_z (p0, z0),
+ z0 = svrintz_z (p0, z0))
+
+/*
+** rintz_f16_z_untied:
+** frintz z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (rintz_f16_z_untied, svfloat16_t,
+ z0 = svrintz_f16_z (p0, z1),
+ z0 = svrintz_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintz_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** frintz z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintz_f32_z_tied1, svfloat32_t,
+ z0 = svrintz_f32_z (p0, z0),
+ z0 = svrintz_z (p0, z0))
+
+/*
+** rintz_f32_z_untied:
+** frintz z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (rintz_f32_z_untied, svfloat32_t,
+ z0 = svrintz_f32_z (p0, z1),
+ z0 = svrintz_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** rintz_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** frintz z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (rintz_f64_z_tied1, svfloat64_t,
+ z0 = svrintz_f64_z (p0, z0),
+ z0 = svrintz_z (p0, z0))
+
+/*
+** rintz_f64_z_untied:
+** frintz z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (rintz_f64_z_untied, svfloat64_t,
+ z0 = svrintz_f64_z (p0, z1),
+ z0 = svrintz_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** sqrt_f16_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fsqrt z0\.h, p0/z, \1\.h
+** ret
+*/
+TEST_UNIFORM_Z (sqrt_f16_z_tied1, svfloat16_t,
+ z0 = svsqrt_f16_z (p0, z0),
+ z0 = svsqrt_z (p0, z0))
+
+/*
+** sqrt_f16_z_untied:
+** fsqrt z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (sqrt_f16_z_untied, svfloat16_t,
+ z0 = svsqrt_f16_z (p0, z1),
+ z0 = svsqrt_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** sqrt_f32_z_tied1:
+** mov (z[0-9]+)\.d, z0\.d
+** fsqrt z0\.s, p0/z, \1\.s
+** ret
+*/
+TEST_UNIFORM_Z (sqrt_f32_z_tied1, svfloat32_t,
+ z0 = svsqrt_f32_z (p0, z0),
+ z0 = svsqrt_z (p0, z0))
+
+/*
+** sqrt_f32_z_untied:
+** fsqrt z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (sqrt_f32_z_untied, svfloat32_t,
+ z0 = svsqrt_f32_z (p0, z1),
+ z0 = svsqrt_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** sqrt_f64_z_tied1:
+** mov (z[0-9]+\.d), z0\.d
+** fsqrt z0\.d, p0/z, \1
+** ret
+*/
+TEST_UNIFORM_Z (sqrt_f64_z_tied1, svfloat64_t,
+ z0 = svsqrt_f64_z (p0, z0),
+ z0 = svsqrt_z (p0, z0))
+
+/*
+** sqrt_f64_z_untied:
+** fsqrt z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (sqrt_f64_z_untied, svfloat64_t,
+ z0 = svsqrt_f64_z (p0, z1),
+ z0 = svsqrt_z (p0, z1))
projects / thirdparty / gcc.git / commitdiff
