realtek: pcs: rtl930x: fix some harebrained piece of code

Part of the calibration procedure contains some weird and harebrained
piece of code where a specific register write is guarded by a check for
the SerDes mode, otherwise an error is printed. But right after this
if-else block, the exact same write is applied anyway. Remove this
brain-dead piece of code with something meaningful, i.e. reference code
from the SDK [1]. Over there, more writes are applied and a proper check
is in place.

While at it, add some another comment to the code. While it is
honourable to have code developed by someone quite some time ago that
works, it's discouraged to just have code without any explanation
especially if it differs from the SDK.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
index a6f6d4f763c899ff3af95f0d5b5f10580c0ef70b..dfdab611298a2a5acc9be6ec3af5791e8b3b8dda 100644 (file)
--- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
@@ -2226,18 +2226,15 @@ static void rtpcs_930x_sds_do_rx_calibration_1(struct rtpcs_serdes *sds,
 
        pr_info("start_1.1.5 LEQ and DFE setting\n");
 
-       /* TODO: make this work for DAC cables of different lengths */
-       /* For a 10GBit serdes wit Fibre, SDS 8 or 9 */
-       if (hw_mode == RTPCS_SDS_MODE_10GBASER ||
-           hw_mode == RTPCS_SDS_MODE_1000BASEX ||
-           hw_mode == RTPCS_SDS_MODE_SGMII)
-               rtpcs_sds_write_bits(sds, 0x2e, 0x16,  3,  2, 0x02);
-       else
-               pr_err("%s not PHY-based or SerDes, implement DAC!\n", __func__);
-
-       /* No serdes, check for Aquantia PHYs */
-       rtpcs_sds_write_bits(sds, 0x2e, 0x16,  3,  2, 0x02);
+       /* assume this is equivalent with (PHY_TYPE == SERDES && MEDIA == FIBER_10G) for now */
+       if (hw_mode == RTPCS_SDS_MODE_10GBASER) {
+               rtpcs_sds_write_bits(sds, 0x2e, 0x03, 13, 8, 0x1f);
+               rtpcs_sds_write_bits(sds, 0x2e, 0x00, 13, 13, 0x01);
+               rtpcs_sds_write_bits(sds, 0x2e, 0x16, 14, 8, 0x00);     /* REG0_FILTER_OUT */
+       }
 
+       /* REG0_LEQ_DC_GAIN */
+       rtpcs_sds_write_bits(sds, 0x2e, 0x16,  3,  2, 0x02); /* REG0_LEQ_DC_GAIN, 0x01 for short DACs */
        rtpcs_sds_write_bits(sds, 0x2e, 0x0f,  6,  0, 0x5f);
        rtpcs_sds_write_bits(sds, 0x2f, 0x05,  7,  2, 0x1f);
        rtpcs_sds_write_bits(sds, 0x2e, 0x19,  9,  5, 0x1f);