]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amd/display: Fix gamma 2.2 colorop TF direction in tests
authorAlex Hung <alex.hung@amd.com>
Thu, 21 May 2026 02:10:42 +0000 (20:10 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Jun 2026 17:40:37 +0000 (13:40 -0400)
[Why & How]
Correct the gamma 2.2 TF direction used in the supported-TF bitmask
tests. Degam and blnd use DRM_COLOROP_1D_CURVE_GAMMA22 (EOTF
direction); shaper uses DRM_COLOROP_1D_CURVE_GAMMA22_INV (inverse
EOTF direction).

This aligns the tests with commit d8f9f42effd7
("drm/amd/display: Fix gamma 2.2 colorop TFs").

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c

index 6c77a7159188efe25844596094a2fb41f3fe784c..4245ebd3725b07c0a8fa6a76995ae3789704a262 100644 (file)
@@ -30,10 +30,10 @@ static void dm_test_supported_degam_tfs_has_bt2020_inv_oetf(struct kunit *test)
                          BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF));
 }
 
-static void dm_test_supported_degam_tfs_has_gamma22_inv(struct kunit *test)
+static void dm_test_supported_degam_tfs_has_gamma22(struct kunit *test)
 {
        KUNIT_EXPECT_TRUE(test, amdgpu_dm_supported_degam_tfs &
-                         BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV));
+                         BIT(DRM_COLOROP_1D_CURVE_GAMMA22));
 }
 
 static void dm_test_supported_degam_tfs_no_extra_bits(struct kunit *test)
@@ -41,7 +41,7 @@ static void dm_test_supported_degam_tfs_no_extra_bits(struct kunit *test)
        u64 expected = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
                       BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
                       BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) |
-                      BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
+                      BIT(DRM_COLOROP_1D_CURVE_GAMMA22);
 
        KUNIT_EXPECT_EQ(test, amdgpu_dm_supported_degam_tfs, expected);
 }
@@ -66,10 +66,10 @@ static void dm_test_supported_shaper_tfs_has_bt2020_oetf(struct kunit *test)
                          BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF));
 }
 
-static void dm_test_supported_shaper_tfs_has_gamma22(struct kunit *test)
+static void dm_test_supported_shaper_tfs_has_gamma22_inv(struct kunit *test)
 {
        KUNIT_EXPECT_TRUE(test, amdgpu_dm_supported_shaper_tfs &
-                         BIT(DRM_COLOROP_1D_CURVE_GAMMA22));
+                         BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV));
 }
 
 static void dm_test_supported_shaper_tfs_no_extra_bits(struct kunit *test)
@@ -77,7 +77,7 @@ static void dm_test_supported_shaper_tfs_no_extra_bits(struct kunit *test)
        u64 expected = BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) |
                       BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF) |
                       BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF) |
-                      BIT(DRM_COLOROP_1D_CURVE_GAMMA22);
+                      BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
 
        KUNIT_EXPECT_EQ(test, amdgpu_dm_supported_shaper_tfs, expected);
 }
@@ -102,10 +102,10 @@ static void dm_test_supported_blnd_tfs_has_bt2020_inv_oetf(struct kunit *test)
                          BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF));
 }
 
-static void dm_test_supported_blnd_tfs_has_gamma22_inv(struct kunit *test)
+static void dm_test_supported_blnd_tfs_has_gamma22(struct kunit *test)
 {
        KUNIT_EXPECT_TRUE(test, amdgpu_dm_supported_blnd_tfs &
-                         BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV));
+                         BIT(DRM_COLOROP_1D_CURVE_GAMMA22));
 }
 
 static void dm_test_supported_blnd_tfs_no_extra_bits(struct kunit *test)
@@ -113,7 +113,7 @@ static void dm_test_supported_blnd_tfs_no_extra_bits(struct kunit *test)
        u64 expected = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
                       BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
                       BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) |
-                      BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
+                      BIT(DRM_COLOROP_1D_CURVE_GAMMA22);
 
        KUNIT_EXPECT_EQ(test, amdgpu_dm_supported_blnd_tfs, expected);
 }
@@ -130,19 +130,19 @@ static struct kunit_case dm_colorop_test_cases[] = {
        KUNIT_CASE(dm_test_supported_degam_tfs_has_srgb_eotf),
        KUNIT_CASE(dm_test_supported_degam_tfs_has_pq125_eotf),
        KUNIT_CASE(dm_test_supported_degam_tfs_has_bt2020_inv_oetf),
-       KUNIT_CASE(dm_test_supported_degam_tfs_has_gamma22_inv),
+       KUNIT_CASE(dm_test_supported_degam_tfs_has_gamma22),
        KUNIT_CASE(dm_test_supported_degam_tfs_no_extra_bits),
        /* shaper TFs */
        KUNIT_CASE(dm_test_supported_shaper_tfs_has_srgb_inv_eotf),
        KUNIT_CASE(dm_test_supported_shaper_tfs_has_pq125_inv_eotf),
        KUNIT_CASE(dm_test_supported_shaper_tfs_has_bt2020_oetf),
-       KUNIT_CASE(dm_test_supported_shaper_tfs_has_gamma22),
+       KUNIT_CASE(dm_test_supported_shaper_tfs_has_gamma22_inv),
        KUNIT_CASE(dm_test_supported_shaper_tfs_no_extra_bits),
        /* blnd TFs */
        KUNIT_CASE(dm_test_supported_blnd_tfs_has_srgb_eotf),
        KUNIT_CASE(dm_test_supported_blnd_tfs_has_pq125_eotf),
        KUNIT_CASE(dm_test_supported_blnd_tfs_has_bt2020_inv_oetf),
-       KUNIT_CASE(dm_test_supported_blnd_tfs_has_gamma22_inv),
+       KUNIT_CASE(dm_test_supported_blnd_tfs_has_gamma22),
        KUNIT_CASE(dm_test_supported_blnd_tfs_no_extra_bits),
        /* cross-check */
        KUNIT_CASE(dm_test_degam_and_blnd_tfs_match),