drm/i915: Remove i915_reg.h from g4x_dp.c

Move DE_IRQ_REGS to display header to make g4x_dp.c
free from i915_reg.h dependency. These registers are
only used by display and gvt.

v3: Drop a superfluous include (Jani)

v2: Move DE interrupt regs from common to display header (Jani)

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-12-uma.shankar@intel.com

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 4cb753177fd8e1f2df4c8aa19d8c9ef96faad72d..d7de329abf19d9b463bac0e41408f59a9571e1f0 100644 (file)
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -10,7 +10,6 @@
 #include <drm/drm_print.h>
 
 #include "g4x_dp.h"
-#include "i915_reg.h"
 #include "intel_audio.h"
 #include "intel_backlight.h"
 #include "intel_connector.h"

diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index d03f554ecd7e5bebf41501a5290af34f7e333281..5bc891f6de574e76d39aa6cb1d8529a5128fb083 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1049,6 +1049,15 @@
 #define SWF3(dev_priv, i)      _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x72414 + (i) * 4)
 #define SWF_ILK(i)     _MMIO(0x4F000 + (i) * 4)
 
+#define DEISR   _MMIO(0x44000)
+#define DEIMR   _MMIO(0x44004)
+#define DEIIR   _MMIO(0x44008)
+#define DEIER   _MMIO(0x4400c)
+
+#define DE_IRQ_REGS            I915_IRQ_REGS(DEIMR, \
+                                             DEIER, \
+                                             DEIIR)
+
 #define DIGITAL_PORT_HOTPLUG_CNTRL     _MMIO(0x44030)
 #define  DIGITAL_PORTA_HOTPLUG_ENABLE          (1 << 4)
 #define  DIGITAL_PORTA_PULSE_DURATION_2ms      (0 << 2) /* pre-HSW */
@@ -1792,6 +1801,13 @@
                                         SDE_TC_HOTPLUG_ICP(HPD_PORT_TC2) | \
                                         SDE_TC_HOTPLUG_ICP(HPD_PORT_TC1))
 
+/* PCH */
+
+#define SDEISR  _MMIO(0xc4000)
+#define SDEIMR  _MMIO(0xc4004)
+#define SDEIIR  _MMIO(0xc4008)
+#define SDEIER  _MMIO(0xc400c)
+
 #define SDE_IRQ_REGS                   I915_IRQ_REGS(SDEIMR, \
                                                      SDEIER, \
                                                      SDEIIR)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1be8426b6a91251963434ba1b9ce882b61dd9941..b808d1ec5387a39c9a0377557d5206e259e2b4d5 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -727,15 +727,6 @@
 #define VLV_MASTER_IER                 _MMIO(0x4400c) /* Gunit master IER */
 #define   MASTER_INTERRUPT_ENABLE      (1 << 31)
 
-#define DEISR   _MMIO(0x44000)
-#define DEIMR   _MMIO(0x44004)
-#define DEIIR   _MMIO(0x44008)
-#define DEIER   _MMIO(0x4400c)
-
-#define DE_IRQ_REGS            I915_IRQ_REGS(DEIMR, \
-                                             DEIER, \
-                                             DEIIR)
-
 #define GTISR   _MMIO(0x44010)
 #define GTIMR   _MMIO(0x44014)
 #define GTIIR   _MMIO(0x44018)
@@ -863,12 +854,6 @@
 #define   MASK_WAKEMEM                         REG_BIT(13)
 #define   DDI_CLOCK_REG_ACCESS                 REG_BIT(7)
 
-/* PCH */
-
-#define SDEISR  _MMIO(0xc4000)
-#define SDEIMR  _MMIO(0xc4004)
-#define SDEIIR  _MMIO(0xc4008)
-#define SDEIER  _MMIO(0xc400c)
 
 /* Icelake PPS_DATA and _ECC DIP Registers.
  * These are available for transcoders B,C and eDP.