ARM: use BIT() and GENMASK() for fault status register fields

Modernise the fault status field definitions by using BIT() and
GENMASK().

Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index e95f44757dc96e7f746dab7e4bdd4d0f56e725d7..d2bdedaefe149aadbb68dbb3e83f7505695e9972 100644 (file)
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -5,12 +5,12 @@
 /*
  * Fault status register encodings.  We steal bit 31 for our own purposes.
  */
-#define FSR_LNX_PF             (1 << 31)
-#define FSR_CM                 (1 << 13)
-#define FSR_WRITE              (1 << 11)
-#define FSR_FS4                        (1 << 10)
-#define FSR_FS3_0              (15)
-#define FSR_FS5_0              (0x3f)
+#define FSR_LNX_PF             BIT(31)
+#define FSR_CM                 BIT(13)
+#define FSR_WRITE              BIT(11)
+#define FSR_FS4                        BIT(10)
+#define FSR_FS3_0              GENMASK(3, 0)
+#define FSR_FS5_0              GENMASK(5, 0)
 
 #ifdef CONFIG_ARM_LPAE
 #define FSR_FS_AEA             17