realtek: dts: adapt RTL839x mdio bus topology

The RTL839x actually has two mdio busses.

- mdio bus 0 serves ports 0..23
- mdio bus 1 serves ports 24..51

This is baked into hardware and cannot be changed during mdio driver
setup with any register write. With the recent changes the driver
handles ports, phys and busses in a more logical way. So a port X
is assigned to a bus Y and a phy Z (on that bus). This gives a
mapping like

- port 16 <=> bus 0, address 16
- port 32 <=> bus 1, address 8

This unique assignment is used in the mdio driver as follows:

- Request to read bus 1, address 8
- Lookup corresponding port = 32
- Read from port 32

Looking at RTL839x it becomes clear that bus/phy => port lookup can
be achieved in multiple different ways. The simple reason is, that
for this device the driver cannot setup the smi topology. It is
baked into the hardware. So adding a "virtual" second bus does not
change the hardware access but allows to keep phy addresses below 32.
Making an example

mdio_bus0 {
  PHY_C22(40, 40)
}

resolves to port 40. But the same can be achieved with

mdio_bus1 {
  PHY_C22(40, 16)
}

In the first case the kernel sees bus/phy = 0/40 and in the second
case it sees bus/phy = 1/16. Both result in the access to the same
phy device on hardware port 40.

Use this analogy for RTL839x devices to match the real hardware
topology. For this change the existing dts and

- activate mdio bus 1 in rtl839x.dtsi
- rearrange devices with ports 24..51 to make use of bus 1

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23186
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts b/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
index 1eff3f5ee389e8d1a949bd5e40185583debb6886..bc71e445cef8bdce1532257f4b7441c43ea2d2d0 100644 (file)
--- a/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
+++ b/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
@@ -70,12 +70,12 @@
        };
 };
 
-&mdio_bus0 {
+&mdio_bus1 {
        /* External phy RTL8214FC #1 */
-       PHY_C22_SFP(48, 48, 0)
-       PHY_C22_SFP(49, 49, 1)
-       PHY_C22_SFP(50, 50, 2)
-       PHY_C22_SFP(51, 51, 3)
+       PHY_C22_SFP(48, 24, 0)
+       PHY_C22_SFP(49, 25, 1)
+       PHY_C22_SFP(50, 26, 2)
+       PHY_C22_SFP(51, 27, 3)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts b/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
index 4001219f7d05bfc4b4fe37428999c9886f46ee12..374fee05be21f4f77d94c7c05133fc6c3cc5ca77 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
+++ b/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
@@ -40,42 +40,44 @@
        PHY_C22(21, 21)
        PHY_C22(22, 22)
        PHY_C22(23, 23)
+};
 
+&mdio_bus1 {
        /* External phy RTL8218B #4 */
-       PHY_C22(24, 24)
-       PHY_C22(25, 25)
-       PHY_C22(26, 26)
-       PHY_C22(27, 27)
-       PHY_C22(28, 28)
-       PHY_C22(29, 29)
-       PHY_C22(30, 30)
-       PHY_C22(31, 31)
+       PHY_C22(24, 0)
+       PHY_C22(25, 1)
+       PHY_C22(26, 2)
+       PHY_C22(27, 3)
+       PHY_C22(28, 4)
+       PHY_C22(29, 5)
+       PHY_C22(30, 6)
+       PHY_C22(31, 7)
 
        /* External phy RTL8218B #5 */
-       PHY_C22(32, 32)
-       PHY_C22(33, 33)
-       PHY_C22(34, 34)
-       PHY_C22(35, 35)
-       PHY_C22(36, 36)
-       PHY_C22(37, 37)
-       PHY_C22(38, 38)
-       PHY_C22(39, 39)
+       PHY_C22(32, 8)
+       PHY_C22(33, 9)
+       PHY_C22(34, 10)
+       PHY_C22(35, 11)
+       PHY_C22(36, 12)
+       PHY_C22(37, 13)
+       PHY_C22(38, 14)
+       PHY_C22(39, 15)
 
        /* External phy RTL8218B #6 */
-       PHY_C22(40, 40)
-       PHY_C22(41, 41)
-       PHY_C22(42, 42)
-       PHY_C22(43, 43)
-       PHY_C22(44, 44)
-       PHY_C22(45, 45)
-       PHY_C22(46, 46)
-       PHY_C22(47, 47)
+       PHY_C22(40, 16)
+       PHY_C22(41, 17)
+       PHY_C22(42, 18)
+       PHY_C22(43, 19)
+       PHY_C22(44, 20)
+       PHY_C22(45, 21)
+       PHY_C22(46, 22)
+       PHY_C22(47, 23)
 
        /* External phy RTL8214FC */
-       PHY_C22_SFP(48, 48, 0)
-       PHY_C22_SFP(49, 49, 1)
-       PHY_C22_SFP(50, 50, 2)
-       PHY_C22_SFP(51, 51, 3)
+       PHY_C22_SFP(48, 24, 0)
+       PHY_C22_SFP(49, 25, 1)
+       PHY_C22_SFP(50, 26, 2)
+       PHY_C22_SFP(51, 27, 3)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_edgecore_ecs4100-12ph.dts b/target/linux/realtek/dts/rtl8393_edgecore_ecs4100-12ph.dts
index 1b8aebf5d5db767595f995564c46b1c2ce20b563..5c65ac91da64dfeb6714cd148a46273902cda1f4 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_edgecore_ecs4100-12ph.dts
+++ b/target/linux/realtek/dts/rtl8393_edgecore_ecs4100-12ph.dts
@@ -180,12 +180,14 @@
        PHY_C22(5, 5)
        PHY_C22(6, 6)
        PHY_C22(7, 7)
+};
 
+&mdio_bus1 {
        /* External phy RTL8214FC */
-       PHY_C22_SFP(48, 48, 0)
-       PHY_C22_SFP(49, 49, 1)
-       PHY_C22_SFP(50, 50, 2)
-       PHY_C22_SFP(51, 51, 3)
+       PHY_C22_SFP(48, 24, 0)
+       PHY_C22_SFP(49, 25, 1)
+       PHY_C22_SFP(50, 26, 2)
+       PHY_C22_SFP(51, 27, 3)
 };
 
 &spi0 {

diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
index db813768c74aa93f44798dbc00405ff9c7d12fca..8c138a5a3af7520afe4f07ebd6a6b858c487f17b 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
@@ -90,11 +90,11 @@
        };
 };
 
-&mdio_bus0 {
-       PHY_C22_SFP(48, 48, 0)
-       PHY_C22_SFP(49, 49, 1)
-       PHY_C22_SFP(50, 50, 2)
-       PHY_C22_SFP(51, 51, 3)
+&mdio_bus1 {
+       PHY_C22_SFP(48, 24, 0)
+       PHY_C22_SFP(49, 25, 1)
+       PHY_C22_SFP(50, 26, 2)
+       PHY_C22_SFP(51, 27, 3)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
index 5393e8fbac8103969f14fdc5960cc9e3ae743ef2..6b0760d6962f9bb5fad481d9bb5655feec7b2b1b 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
@@ -80,11 +80,11 @@
 
 };
 
-&mdio_bus0 {
-       PHY_C22_SFP(48, 48, 1)
-       PHY_C22_SFP(49, 49, 3)
-       PHY_C22_SFP(50, 50, 0)
-       PHY_C22_SFP(51, 51, 2)
+&mdio_bus1 {
+       PHY_C22_SFP(48, 24, 1)
+       PHY_C22_SFP(49, 25, 3)
+       PHY_C22_SFP(50, 26, 0)
+       PHY_C22_SFP(51, 27, 2)
 };
 
 

diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
index a4d5299a278e1c7c09d651a7beb1d990aab53986..05ca0c48960429a885576bfbb69f905b2e4450fe 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
@@ -51,33 +51,35 @@
        PHY_C22(21, 21)
        PHY_C22(22, 22)
        PHY_C22(23, 23)
+};
 
-       PHY_C22(24, 24)
-       PHY_C22(25, 25)
-       PHY_C22(26, 26)
-       PHY_C22(27, 27)
-       PHY_C22(28, 28)
-       PHY_C22(29, 29)
-       PHY_C22(30, 30)
-       PHY_C22(31, 31)
-
-       PHY_C22(32, 32)
-       PHY_C22(33, 33)
-       PHY_C22(34, 34)
-       PHY_C22(35, 35)
-       PHY_C22(36, 36)
-       PHY_C22(37, 37)
-       PHY_C22(38, 38)
-       PHY_C22(39, 39)
-
-       PHY_C22(40, 40)
-       PHY_C22(41, 41)
-       PHY_C22(42, 42)
-       PHY_C22(43, 43)
-       PHY_C22(44, 44)
-       PHY_C22(45, 45)
-       PHY_C22(46, 46)
-       PHY_C22(47, 47)
+&mdio_bus1 {
+       PHY_C22(24, 0)
+       PHY_C22(25, 1)
+       PHY_C22(26, 2)
+       PHY_C22(27, 3)
+       PHY_C22(28, 4)
+       PHY_C22(29, 5)
+       PHY_C22(30, 6)
+       PHY_C22(31, 7)
+
+       PHY_C22(32, 8)
+       PHY_C22(33, 9)
+       PHY_C22(34, 10)
+       PHY_C22(35, 11)
+       PHY_C22(36, 12)
+       PHY_C22(37, 13)
+       PHY_C22(38, 14)
+       PHY_C22(39, 15)
+
+       PHY_C22(40, 16)
+       PHY_C22(41, 17)
+       PHY_C22(42, 18)
+       PHY_C22(43, 19)
+       PHY_C22(44, 20)
+       PHY_C22(45, 21)
+       PHY_C22(46, 22)
+       PHY_C22(47, 23)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
index 906a04d9a3089f157d9e1908aa1a4a16a17d51d9..bfdc3572055b0ed2346c9f504eaaf25975898161 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
+++ b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
@@ -135,36 +135,38 @@
        PHY_C22(21, 21)
        PHY_C22(22, 22)
        PHY_C22(23, 23)
+};
 
+&mdio_bus1 {
        /* External phy RTL8218B #4 */
-       PHY_C22(24, 24)
-       PHY_C22(25, 25)
-       PHY_C22(26, 26)
-       PHY_C22(27, 27)
-       PHY_C22(28, 28)
-       PHY_C22(29, 29)
-       PHY_C22(30, 30)
-       PHY_C22(31, 31)
+       PHY_C22(24, 0)
+       PHY_C22(25, 1)
+       PHY_C22(26, 2)
+       PHY_C22(27, 3)
+       PHY_C22(28, 4)
+       PHY_C22(29, 5)
+       PHY_C22(30, 6)
+       PHY_C22(31, 7)
 
        /* External phy RTL8218B #5 */
-       PHY_C22(32, 32)
-       PHY_C22(33, 33)
-       PHY_C22(34, 34)
-       PHY_C22(35, 35)
-       PHY_C22(36, 36)
-       PHY_C22(37, 37)
-       PHY_C22(38, 38)
-       PHY_C22(39, 39)
+       PHY_C22(32, 8)
+       PHY_C22(33, 9)
+       PHY_C22(34, 10)
+       PHY_C22(35, 11)
+       PHY_C22(36, 12)
+       PHY_C22(37, 13)
+       PHY_C22(38, 14)
+       PHY_C22(39, 15)
 
        /* External phy RTL8218B #6 */
-       PHY_C22(40, 40)
-       PHY_C22(41, 41)
-       PHY_C22(42, 42)
-       PHY_C22(43, 43)
-       PHY_C22(44, 44)
-       PHY_C22(45, 45)
-       PHY_C22(46, 46)
-       PHY_C22(47, 47)
+       PHY_C22(40, 16)
+       PHY_C22(41, 17)
+       PHY_C22(42, 18)
+       PHY_C22(43, 19)
+       PHY_C22(44, 20)
+       PHY_C22(45, 21)
+       PHY_C22(46, 22)
+       PHY_C22(47, 23)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts b/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
index 5c811f36fa600f4353ff9f3f9ac7f099a2541ca2..783f933ad32649e5f4458f7057c4f54df5838d29 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
+++ b/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
@@ -269,34 +269,36 @@
        PHY_C22(21, 21)
        PHY_C22(22, 22)
        PHY_C22(23, 23)
+};
 
-       PHY_C22(24, 24)
-       PHY_C22(25, 25)
-       PHY_C22(26, 26)
-       PHY_C22(27, 27)
-       PHY_C22(28, 28)
-       PHY_C22(29, 29)
-       PHY_C22(30, 30)
-       PHY_C22(31, 31)
-
-       PHY_C22(32, 32)
-       PHY_C22(33, 33)
-       PHY_C22(34, 34)
-       PHY_C22(35, 35)
-       PHY_C22(36, 36)
-       PHY_C22(37, 37)
-       PHY_C22(38, 38)
-       PHY_C22(39, 39)
+&mdio_bus1 {
+       PHY_C22(24, 0)
+       PHY_C22(25, 1)
+       PHY_C22(26, 2)
+       PHY_C22(27, 3)
+       PHY_C22(28, 4)
+       PHY_C22(29, 5)
+       PHY_C22(30, 6)
+       PHY_C22(31, 7)
+
+       PHY_C22(32, 8)
+       PHY_C22(33, 9)
+       PHY_C22(34, 10)
+       PHY_C22(35, 11)
+       PHY_C22(36, 12)
+       PHY_C22(37, 13)
+       PHY_C22(38, 14)
+       PHY_C22(39, 15)
 
        /* RTL8218FB */
-       PHY_C22(40, 40)
-       PHY_C22(41, 41)
-       PHY_C22(42, 42)
-       PHY_C22(43, 43)
-       PHY_C22(44, 44)
-       PHY_C22(45, 45)
-       PHY_C22(46, 46)
-       PHY_C22(47, 47)
+       PHY_C22(40, 16)
+       PHY_C22(41, 17)
+       PHY_C22(42, 18)
+       PHY_C22(43, 19)
+       PHY_C22(44, 20)
+       PHY_C22(45, 21)
+       PHY_C22(46, 22)
+       PHY_C22(47, 23)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts b/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts
index 10526efc5c839c09d0d68eb4b93298d333ca380b..8d0823d728d9a4351590b4bf7af56b7184c83cf3 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts
+++ b/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts
@@ -309,36 +309,38 @@
        PHY_C22(21, 21)
        PHY_C22(22, 22)
        PHY_C22(23, 23)
+};
 
+&mdio_bus1 {
        /* External phy RTL8218B #4 */
-       PHY_C22(24, 24)
-       PHY_C22(25, 25)
-       PHY_C22(26, 26)
-       PHY_C22(27, 27)
-       PHY_C22(28, 28)
-       PHY_C22(29, 29)
-       PHY_C22(30, 30)
-       PHY_C22(31, 31)
+       PHY_C22(24, 0)
+       PHY_C22(25, 1)
+       PHY_C22(26, 2)
+       PHY_C22(27, 3)
+       PHY_C22(28, 4)
+       PHY_C22(29, 5)
+       PHY_C22(30, 6)
+       PHY_C22(31, 7)
 
        /* External phy RTL8218B #5 */
-       PHY_C22(32, 32)
-       PHY_C22(33, 33)
-       PHY_C22(34, 34)
-       PHY_C22(35, 35)
-       PHY_C22(36, 36)
-       PHY_C22(37, 37)
-       PHY_C22(38, 38)
-       PHY_C22(39, 39)
+       PHY_C22(32, 8)
+       PHY_C22(33, 9)
+       PHY_C22(34, 10)
+       PHY_C22(35, 11)
+       PHY_C22(36, 12)
+       PHY_C22(37, 13)
+       PHY_C22(38, 14)
+       PHY_C22(39, 15)
 
        /* External phy RTL8218B #6 */
-       PHY_C22(40, 40)
-       PHY_C22(41, 41)
-       PHY_C22(42, 42)
-       PHY_C22(43, 43)
-       PHY_C22(44, 44)
-       PHY_C22(45, 45)
-       PHY_C22(46, 46)
-       PHY_C22(47, 47)
+       PHY_C22(40, 16)
+       PHY_C22(41, 17)
+       PHY_C22(42, 18)
+       PHY_C22(43, 19)
+       PHY_C22(44, 20)
+       PHY_C22(45, 21)
+       PHY_C22(46, 22)
+       PHY_C22(47, 23)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dtsi b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dtsi
index bd19062b54ab2ab94994437771b0b372dfdcee3d..b6fe0d8904632fa342eea53712b7bbda1ba20308 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dtsi
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dtsi
@@ -274,36 +274,38 @@
        PHY_C22(21, 21)
        PHY_C22(22, 22)
        PHY_C22(23, 23)
+};
 
+&mdio_bus1 {
        /* External phy RTL8218B #4 */
-       PHY_C22(24, 24)
-       PHY_C22(25, 25)
-       PHY_C22(26, 26)
-       PHY_C22(27, 27)
-       PHY_C22(28, 28)
-       PHY_C22(29, 29)
-       PHY_C22(30, 30)
-       PHY_C22(31, 31)
+       PHY_C22(24, 0)
+       PHY_C22(25, 1)
+       PHY_C22(26, 2)
+       PHY_C22(27, 3)
+       PHY_C22(28, 4)
+       PHY_C22(29, 5)
+       PHY_C22(30, 6)
+       PHY_C22(31, 7)
 
        /* External phy RTL8218B #5 */
-       PHY_C22(32, 32)
-       PHY_C22(33, 33)
-       PHY_C22(34, 34)
-       PHY_C22(35, 35)
-       PHY_C22(36, 36)
-       PHY_C22(37, 37)
-       PHY_C22(38, 38)
-       PHY_C22(39, 39)
+       PHY_C22(32, 8)
+       PHY_C22(33, 9)
+       PHY_C22(34, 10)
+       PHY_C22(35, 11)
+       PHY_C22(36, 12)
+       PHY_C22(37, 13)
+       PHY_C22(38, 14)
+       PHY_C22(39, 15)
 
        /* External phy RTL8218B #6 */
-       PHY_C22(40, 40)
-       PHY_C22(41, 41)
-       PHY_C22(42, 42)
-       PHY_C22(43, 43)
-       PHY_C22(44, 44)
-       PHY_C22(45, 45)
-       PHY_C22(46, 46)
-       PHY_C22(47, 47)
+       PHY_C22(40, 16)
+       PHY_C22(41, 17)
+       PHY_C22(42, 18)
+       PHY_C22(43, 19)
+       PHY_C22(44, 20)
+       PHY_C22(45, 21)
+       PHY_C22(46, 22)
+       PHY_C22(47, 23)
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl839x.dtsi b/target/linux/realtek/dts/rtl839x.dtsi
index c06773f83e8a38087e078cafda10e8f2c2cf9889..48b383687d5649b736a3661561491915b18201c7 100644 (file)
--- a/target/linux/realtek/dts/rtl839x.dtsi
+++ b/target/linux/realtek/dts/rtl839x.dtsi
@@ -236,6 +236,11 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                        };
+                       mdio_bus1: mdio-bus@1 {
+                               reg = <1>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
                };
 
                mdio_aux: mdio-aux {