--- /dev/null
+From eb4961d2633cd68e81fcd870b9d0b33b24a45e8d Mon Sep 17 00:00:00 2001
+From: David S. Miller <davem@davemloft.net>
+Date: Fri, 12 Sep 2008 15:13:15 -0700
+Subject: sparc64: Fix PCI error interrupt registry on PSYCHO.
+Message-Id: <20081006.123535.51287299.davem@davemloft.net>
+
+From: David S. Miller <davem@davemloft.net>
+
+[ Upstream commit 80a56ab626c70468be92e74cf3d288ffaed23fdb ]
+
+We need to pass IRQF_SHARED, otherwise we get things like:
+
+IRQ handler type mismatch for IRQ 33
+current handler: PSYCHO_UE
+Call Trace:
+ [000000000048394c] request_irq+0xac/0x120
+ [00000000007c5f6c] psycho_scan_bus+0x98/0x158
+ [00000000007c2bc0] pcibios_init+0xdc/0x12c
+ [0000000000426a5c] do_one_initcall+0x1c/0x160
+ [00000000007c0180] kernel_init+0x9c/0xfc
+ [0000000000427050] kernel_thread+0x30/0x60
+ [00000000006ae1d0] rest_init+0x10/0x60
+
+on e3500 and similar systems.
+
+On a single board, the UE interrupts of two Psycho nodes
+are funneled through the same interrupt, from of_debug=3
+dump:
+
+/pci@b,4000: direct translate 2ee --> 21
+ ...
+/pci@b,2000: direct translate 2ee --> 21
+
+Decimal "33" mentioned above is the hex "21" mentioned here.
+
+Thanks to Meelis Roos for dumps and testing.
+
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc64/kernel/pci_psycho.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/sparc64/kernel/pci_psycho.c
++++ b/arch/sparc64/kernel/pci_psycho.c
+@@ -744,16 +744,16 @@ static void psycho_register_error_handle
+ * the second will just error out since we do not pass in
+ * IRQF_SHARED.
+ */
+- err = request_irq(op->irqs[1], psycho_ue_intr, 0,
++ err = request_irq(op->irqs[1], psycho_ue_intr, IRQF_SHARED,
+ "PSYCHO_UE", pbm);
+- err = request_irq(op->irqs[2], psycho_ce_intr, 0,
++ err = request_irq(op->irqs[2], psycho_ce_intr, IRQF_SHARED,
+ "PSYCHO_CE", pbm);
+
+ /* This one, however, ought not to fail. We can just warn
+ * about it since the system can still operate properly even
+ * if this fails.
+ */
+- err = request_irq(op->irqs[0], psycho_pcierr_intr, 0,
++ err = request_irq(op->irqs[0], psycho_pcierr_intr, IRQF_SHARED,
+ "PSYCHO_PCIERR", pbm);
+ if (err)
+ printk(KERN_WARNING "%s: Could not register PCIERR, "
--- /dev/null
+From 3741f5972cc5a6b21c89e2a1deea8f724e423a4c Mon Sep 17 00:00:00 2001
+From: David S. Miller <davem@davemloft.net>
+Date: Wed, 10 Sep 2008 14:08:27 -0700
+Subject: sparc64: Fix interrupt register calculations on Psycho and Sabre.
+Message-Id: <20081006.123535.51287299.davem@davemloft.net>
+
+From: David S. Miller <davem@davemloft.net>
+
+[ Upstream commit ebfb2c63405f2410897674f14e41c031c9302909 ]
+
+Use the IMAP offset calculation for OBIO devices as documented in the
+programmer's manual. Which is "0x10000 + ((ino & 0x1f) << 3)"
+
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc64/kernel/prom.c | 104 ++-------------------------------------------
+ 1 file changed, 6 insertions(+), 98 deletions(-)
+
+--- a/arch/sparc64/kernel/prom.c
++++ b/arch/sparc64/kernel/prom.c
+@@ -156,55 +156,11 @@ static unsigned long psycho_pcislot_imap
+ return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
+ }
+
+-#define PSYCHO_IMAP_SCSI 0x1000UL
+-#define PSYCHO_IMAP_ETH 0x1008UL
+-#define PSYCHO_IMAP_BPP 0x1010UL
+-#define PSYCHO_IMAP_AU_REC 0x1018UL
+-#define PSYCHO_IMAP_AU_PLAY 0x1020UL
+-#define PSYCHO_IMAP_PFAIL 0x1028UL
+-#define PSYCHO_IMAP_KMS 0x1030UL
+-#define PSYCHO_IMAP_FLPY 0x1038UL
+-#define PSYCHO_IMAP_SHW 0x1040UL
+-#define PSYCHO_IMAP_KBD 0x1048UL
+-#define PSYCHO_IMAP_MS 0x1050UL
+-#define PSYCHO_IMAP_SER 0x1058UL
+-#define PSYCHO_IMAP_TIM0 0x1060UL
+-#define PSYCHO_IMAP_TIM1 0x1068UL
+-#define PSYCHO_IMAP_UE 0x1070UL
+-#define PSYCHO_IMAP_CE 0x1078UL
+-#define PSYCHO_IMAP_A_ERR 0x1080UL
+-#define PSYCHO_IMAP_B_ERR 0x1088UL
+-#define PSYCHO_IMAP_PMGMT 0x1090UL
+-#define PSYCHO_IMAP_GFX 0x1098UL
+-#define PSYCHO_IMAP_EUPA 0x10a0UL
+-
+-static unsigned long __psycho_onboard_imap_off[] = {
+-/*0x20*/ PSYCHO_IMAP_SCSI,
+-/*0x21*/ PSYCHO_IMAP_ETH,
+-/*0x22*/ PSYCHO_IMAP_BPP,
+-/*0x23*/ PSYCHO_IMAP_AU_REC,
+-/*0x24*/ PSYCHO_IMAP_AU_PLAY,
+-/*0x25*/ PSYCHO_IMAP_PFAIL,
+-/*0x26*/ PSYCHO_IMAP_KMS,
+-/*0x27*/ PSYCHO_IMAP_FLPY,
+-/*0x28*/ PSYCHO_IMAP_SHW,
+-/*0x29*/ PSYCHO_IMAP_KBD,
+-/*0x2a*/ PSYCHO_IMAP_MS,
+-/*0x2b*/ PSYCHO_IMAP_SER,
+-/*0x2c*/ PSYCHO_IMAP_TIM0,
+-/*0x2d*/ PSYCHO_IMAP_TIM1,
+-/*0x2e*/ PSYCHO_IMAP_UE,
+-/*0x2f*/ PSYCHO_IMAP_CE,
+-/*0x30*/ PSYCHO_IMAP_A_ERR,
+-/*0x31*/ PSYCHO_IMAP_B_ERR,
+-/*0x32*/ PSYCHO_IMAP_PMGMT,
+-/*0x33*/ PSYCHO_IMAP_GFX,
+-/*0x34*/ PSYCHO_IMAP_EUPA,
+-};
++#define PSYCHO_OBIO_IMAP_BASE 0x1000UL
++
+ #define PSYCHO_ONBOARD_IRQ_BASE 0x20
+-#define PSYCHO_ONBOARD_IRQ_LAST 0x34
+ #define psycho_onboard_imap_offset(__ino) \
+- __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
++ (PSYCHO_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3))
+
+ #define PSYCHO_ICLR_A_SLOT0 0x1400UL
+ #define PSYCHO_ICLR_SCSI 0x1800UL
+@@ -228,10 +184,6 @@ static unsigned int psycho_irq_build(str
+ imap_off = psycho_pcislot_imap_offset(ino);
+ } else {
+ /* Onboard device */
+- if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
+- prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
+- prom_halt();
+- }
+ imap_off = psycho_onboard_imap_offset(ino);
+ }
+
+@@ -318,23 +270,6 @@ static void sabre_wsync_handler(unsigned
+
+ #define SABRE_IMAP_A_SLOT0 0x0c00UL
+ #define SABRE_IMAP_B_SLOT0 0x0c20UL
+-#define SABRE_IMAP_SCSI 0x1000UL
+-#define SABRE_IMAP_ETH 0x1008UL
+-#define SABRE_IMAP_BPP 0x1010UL
+-#define SABRE_IMAP_AU_REC 0x1018UL
+-#define SABRE_IMAP_AU_PLAY 0x1020UL
+-#define SABRE_IMAP_PFAIL 0x1028UL
+-#define SABRE_IMAP_KMS 0x1030UL
+-#define SABRE_IMAP_FLPY 0x1038UL
+-#define SABRE_IMAP_SHW 0x1040UL
+-#define SABRE_IMAP_KBD 0x1048UL
+-#define SABRE_IMAP_MS 0x1050UL
+-#define SABRE_IMAP_SER 0x1058UL
+-#define SABRE_IMAP_UE 0x1070UL
+-#define SABRE_IMAP_CE 0x1078UL
+-#define SABRE_IMAP_PCIERR 0x1080UL
+-#define SABRE_IMAP_GFX 0x1098UL
+-#define SABRE_IMAP_EUPA 0x10a0UL
+ #define SABRE_ICLR_A_SLOT0 0x1400UL
+ #define SABRE_ICLR_B_SLOT0 0x1480UL
+ #define SABRE_ICLR_SCSI 0x1800UL
+@@ -364,33 +299,10 @@ static unsigned long sabre_pcislot_imap_
+ return SABRE_IMAP_B_SLOT0 + (slot * 8);
+ }
+
+-static unsigned long __sabre_onboard_imap_off[] = {
+-/*0x20*/ SABRE_IMAP_SCSI,
+-/*0x21*/ SABRE_IMAP_ETH,
+-/*0x22*/ SABRE_IMAP_BPP,
+-/*0x23*/ SABRE_IMAP_AU_REC,
+-/*0x24*/ SABRE_IMAP_AU_PLAY,
+-/*0x25*/ SABRE_IMAP_PFAIL,
+-/*0x26*/ SABRE_IMAP_KMS,
+-/*0x27*/ SABRE_IMAP_FLPY,
+-/*0x28*/ SABRE_IMAP_SHW,
+-/*0x29*/ SABRE_IMAP_KBD,
+-/*0x2a*/ SABRE_IMAP_MS,
+-/*0x2b*/ SABRE_IMAP_SER,
+-/*0x2c*/ 0 /* reserved */,
+-/*0x2d*/ 0 /* reserved */,
+-/*0x2e*/ SABRE_IMAP_UE,
+-/*0x2f*/ SABRE_IMAP_CE,
+-/*0x30*/ SABRE_IMAP_PCIERR,
+-/*0x31*/ 0 /* reserved */,
+-/*0x32*/ 0 /* reserved */,
+-/*0x33*/ SABRE_IMAP_GFX,
+-/*0x34*/ SABRE_IMAP_EUPA,
+-};
+-#define SABRE_ONBOARD_IRQ_BASE 0x20
+-#define SABRE_ONBOARD_IRQ_LAST 0x30
++#define SABRE_OBIO_IMAP_BASE 0x1000UL
++#define SABRE_ONBOARD_IRQ_BASE 0x20
+ #define sabre_onboard_imap_offset(__ino) \
+- __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
++ (SABRE_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3))
+
+ #define sabre_iclr_offset(ino) \
+ ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
+@@ -453,10 +365,6 @@ static unsigned int sabre_irq_build(stru
+ imap_off = sabre_pcislot_imap_offset(ino);
+ } else {
+ /* onboard device */
+- if (ino > SABRE_ONBOARD_IRQ_LAST) {
+- prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
+- prom_halt();
+- }
+ imap_off = sabre_onboard_imap_offset(ino);
+ }
+
--- /dev/null
+From 1f8030d9f80d7d067150d1276f60689e35d475ca Mon Sep 17 00:00:00 2001
+From: David S. Miller <davem@davemloft.net>
+Date: Tue, 16 Sep 2008 09:53:42 -0700
+Subject: sparc64: Fix OOPS in psycho_pcierr_intr_other().
+Message-Id: <20081006.123535.51287299.davem@davemloft.net>
+
+From: David S. Miller <davem@davemloft.net>
+
+[ Upstream commit f948cc6ab9e61a8e88d70ee9aafc690e6d26f92c ]
+
+We no longer put the top-level PCI controller device into the
+PCI layer device list. So pbm->pci_bus->self is always NULL.
+
+Therefore, use direct PCI config space accesses to get at
+the PCI controller's PCI_STATUS register.
+
+Tested by Meelis Roos.
+
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc64/kernel/pci_psycho.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/arch/sparc64/kernel/pci_psycho.c
++++ b/arch/sparc64/kernel/pci_psycho.c
+@@ -575,7 +575,7 @@ static irqreturn_t psycho_pcierr_intr_ot
+ {
+ unsigned long csr_reg, csr, csr_error_bits;
+ irqreturn_t ret = IRQ_NONE;
+- u16 stat;
++ u16 stat, *addr;
+
+ if (is_pbm_a) {
+ csr_reg = pbm->controller_regs + PSYCHO_PCIA_CTRL;
+@@ -597,7 +597,9 @@ static irqreturn_t psycho_pcierr_intr_ot
+ printk("%s: PCI SERR signal asserted.\n", pbm->name);
+ ret = IRQ_HANDLED;
+ }
+- pci_read_config_word(pbm->pci_bus->self, PCI_STATUS, &stat);
++ addr = psycho_pci_config_mkaddr(pbm, pbm->pci_first_busno,
++ 0, PCI_STATUS);
++ pci_config_read16(addr, &stat);
+ if (stat & (PCI_STATUS_PARITY |
+ PCI_STATUS_SIG_TARGET_ABORT |
+ PCI_STATUS_REC_TARGET_ABORT |
+@@ -605,7 +607,7 @@ static irqreturn_t psycho_pcierr_intr_ot
+ PCI_STATUS_SIG_SYSTEM_ERROR)) {
+ printk("%s: PCI bus error, PCI_STATUS[%04x]\n",
+ pbm->name, stat);
+- pci_write_config_word(pbm->pci_bus->self, PCI_STATUS, 0xffff);
++ pci_config_write16(addr, 0xffff);
+ ret = IRQ_HANDLED;
+ }
+ return ret;
--- /dev/null
+From 0c9254912e8e9191617f20e95069b566d483304e Mon Sep 17 00:00:00 2001
+From: David S. Miller <davem@davemloft.net>
+Date: Sat, 20 Sep 2008 22:00:40 -0700
+Subject: sparc64: Fix disappearing PCI devices on e3500.
+Message-Id: <20081006.123535.51287299.davem@davemloft.net>
+
+From: David S. Miller <davem@davemloft.net>
+
+[ Upstream commit 7ee766d8fba9dfd93bf3eca7a8d84a25404a68dc ]
+
+Based upon a bug report by Meelis Roos.
+
+The OF device layer builds properties by matching bus types and
+applying 'range' properties as appropriate, up to the root.
+
+The match for "PCI" busses is looking at the 'device_type' property,
+and this does work %99 of the time.
+
+But on an E3500 system with a PCI QFE card, the DEC 21153 bridge
+sitting above the QFE network interface devices has a 'name' of "pci",
+but it completely lacks a 'device_type' property. So we don't match
+it as a PCI bus, and subsequently we end up with no resource values at
+all for the devices sitting under that DEC bridge.
+
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc64/kernel/of_device.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+--- a/arch/sparc64/kernel/of_device.c
++++ b/arch/sparc64/kernel/of_device.c
+@@ -170,7 +170,7 @@ static unsigned int of_bus_default_get_f
+
+ static int of_bus_pci_match(struct device_node *np)
+ {
+- if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) {
++ if (!strcmp(np->name, "pci")) {
+ const char *model = of_get_property(np, "model", NULL);
+
+ if (model && !strcmp(model, "SUNW,simba"))
+@@ -201,7 +201,7 @@ static int of_bus_simba_match(struct dev
+ /* Treat PCI busses lacking ranges property just like
+ * simba.
+ */
+- if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) {
++ if (!strcmp(np->name, "pci")) {
+ if (!of_find_property(np, "ranges", NULL))
+ return 1;
+ }
+@@ -426,7 +426,7 @@ static int __init use_1to1_mapping(struc
+ * it lacks a ranges property, and this will include
+ * cases like Simba.
+ */
+- if (!strcmp(pp->type, "pci") || !strcmp(pp->type, "pciex"))
++ if (!strcmp(pp->name, "pci"))
+ return 0;
+
+ return 1;
+@@ -709,8 +709,7 @@ static unsigned int __init build_one_dev
+ break;
+ }
+ } else {
+- if (!strcmp(pp->type, "pci") ||
+- !strcmp(pp->type, "pciex")) {
++ if (!strcmp(pp->name, "pci")) {
+ unsigned int this_orig_irq = irq;
+
+ irq = pci_irq_swizzle(dp, pp, irq);
--- /dev/null
+From 6e97a51ae601d71384bac2115324c25aab372166 Mon Sep 17 00:00:00 2001
+From: David S. Miller <davem@davemloft.net>
+Date: Mon, 22 Sep 2008 15:42:24 -0700
+Subject: sparc64: Fix missing devices due to PCI bridge test in of_create_pci_dev().
+Message-Id: <20081006.123535.51287299.davem@davemloft.net>
+
+From: David S. Miller <davem@davemloft.net>
+
+[ Upstream commit 44b50e5a1af13c605d6c3b17a60e42eb0ee48d5f ]
+
+Just like in the arch/sparc64/kernel/of_device.c code fix commit
+071d7f4c3b411beae08d27656e958070c43b78b4 ("sparc64: Fix disappearing
+PCI devices on e3500.") we have to check the OF device node name for
+"pci" instead of relying upon the 'device_type' property being there
+on all PCI bridges.
+
+Tested by Meelis Roos, and confirmed to make the PCI QFE devices
+reappear on the E3500 system.
+
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc64/kernel/pci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/sparc64/kernel/pci.c
++++ b/arch/sparc64/kernel/pci.c
+@@ -425,7 +425,7 @@ struct pci_dev *of_create_pci_dev(struct
+ dev->current_state = 4; /* unknown power state */
+ dev->error_state = pci_channel_io_normal;
+
+- if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
++ if (!strcmp(node->name, "pci")) {
+ /* a PCI-PCI bridge */
+ dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
+ dev->rom_base_reg = PCI_ROM_ADDRESS1;
0007-sctp-do-not-enable-peer-features-if-we-can-t-do-the.patch
0008-sctp-Fix-oops-when-INIT-ACK-indicates-that-peer-doe.patch
0009-udp-Fix-rcv-socket-locking.patch
+0001-sparc64-Fix-PCI-error-interrupt-registry-on-PSYCHO.patch
+0002-sparc64-Fix-interrupt-register-calculations-on-Psyc.patch
+0003-sparc64-Fix-OOPS-in-psycho_pcierr_intr_other.patch
+0004-sparc64-Fix-disappearing-PCI-devices-on-e3500.patch
+0005-sparc64-Fix-missing-devices-due-to-PCI-bridge-test.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
