]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/crt: Use IS0_R instead of VGA_MIS_W
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 8 Dec 2025 18:26:33 +0000 (20:26 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 23 Jan 2026 03:20:28 +0000 (05:20 +0200)
Use the proper IS0_R name for the VGA input status register 0, instead
of using the VGA_MIS_W alias which is meant for write accesses to the
same address. Yes, VGA registers are weird.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251208182637.334-16-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_crt.c

index dedc26f6a2b2f8f8d73a25f7b7055b115d92e24e..6f216ba887bcc2e843629194c0cd80ef3d656dcc 100644 (file)
@@ -738,7 +738,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
                 * border color for Color info.
                 */
                intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe));
-               st00 = intel_vga_read(display, VGA_MIS_W, true);
+               st00 = intel_vga_read(display, VGA_IS0_R, true);
                status = ((st00 & (1 << 4)) != 0) ?
                        connector_status_connected :
                        connector_status_disconnected;
@@ -786,7 +786,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
                do {
                        count++;
                        /* Read the ST00 VGA status register */
-                       st00 = intel_vga_read(display, VGA_MIS_W, true);
+                       st00 = intel_vga_read(display, VGA_IS0_R, true);
                        if (st00 & (1 << 4))
                                detect++;
                } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl));