drm/i915/dsi: Move initialization of DSI DSC streams-per-pipe to fill_dsc()

Move the initialization of the DSI DSC streams-per-pipe value to
fill_dsc() next to where the corresponding (per-line) slice_count value
is initialized. This allows converting the initialization to use the
detailed slice configuration state in follow-up changes.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-4-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 5b64e8d6e8382dea60f7139157ff22f775559ef0..c8e0333706c1e9e78abadb2d31e270441aae0218 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1624,12 +1624,6 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
        if (crtc_state->pipe_bpp < 8 * 3)
                return -EINVAL;
 
-       /* FIXME: split only when necessary */
-       if (crtc_state->dsc.slice_count > 1)
-               crtc_state->dsc.slice_config.streams_per_pipe = 2;
-       else
-               crtc_state->dsc.slice_config.streams_per_pipe = 1;
-
        /* FIXME: initialize from VBT */
        vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
 

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index ae0b922d5bc3da47481ef93f63ad20f61318292a..9b4428472831824b33457609174cb228b01e4a7e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3575,10 +3575,14 @@ static void fill_dsc(struct intel_crtc_state *crtc_state,
         * throughput etc. into account.
         *
         * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
+        *
+        * FIXME: split only when necessary
         */
        if (dsc->slices_per_line & BIT(2)) {
+               crtc_state->dsc.slice_config.streams_per_pipe = 2;
                crtc_state->dsc.slice_count = 4;
        } else if (dsc->slices_per_line & BIT(1)) {
+               crtc_state->dsc.slice_config.streams_per_pipe = 2;
                crtc_state->dsc.slice_count = 2;
        } else {
                /* FIXME */
@@ -3586,6 +3590,7 @@ static void fill_dsc(struct intel_crtc_state *crtc_state,
                        drm_dbg_kms(display->drm,
                                    "VBT: Unsupported DSC slice count for DSI\n");
 
+               crtc_state->dsc.slice_config.streams_per_pipe = 1;
                crtc_state->dsc.slice_count = 1;
        }