static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-@@ -699,6 +765,10 @@ static void rk35xx_sdhci_reset(struct sd
+@@ -712,6 +778,10 @@ static void rk35xx_sdhci_reset(struct sd
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
struct rk35xx_priv *priv = dwc_priv->priv;
if (mask & SDHCI_RESET_ALL && priv->reset) {
reset_control_assert(priv->reset);
-@@ -707,6 +777,9 @@ static void rk35xx_sdhci_reset(struct sd
+@@ -720,6 +790,9 @@ static void rk35xx_sdhci_reset(struct sd
}
sdhci_reset(host, mask);
}
static int dwcmshc_rk35xx_init(struct device *dev, struct sdhci_host *host,
-@@ -1200,6 +1273,15 @@ static const struct dwcmshc_pltfm_data s
+@@ -1213,6 +1286,15 @@ static const struct dwcmshc_pltfm_data s
};
#endif
static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = {
.pdata = {
.ops = &sdhci_dwcmshc_rk35xx_ops,
-@@ -1208,6 +1290,7 @@ static const struct dwcmshc_pltfm_data s
+@@ -1221,6 +1303,7 @@ static const struct dwcmshc_pltfm_data s
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
},
.init = dwcmshc_rk35xx_init,
.postinit = dwcmshc_rk35xx_postinit,
};
-@@ -1257,7 +1340,8 @@ static const struct cqhci_host_ops dwcms
+@@ -1270,7 +1353,8 @@ static const struct cqhci_host_ops dwcms
.set_tran_desc = dwcmshc_set_tran_desc,
};
{
struct cqhci_host *cq_host;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-@@ -1287,7 +1371,10 @@ static void dwcmshc_cqhci_init(struct sd
+@@ -1300,7 +1384,10 @@ static void dwcmshc_cqhci_init(struct sd
}
cq_host->mmio = host->ioaddr + priv->vendor_specific_area2;
/* Enable using of 128-bit task descriptors */
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
-@@ -1455,7 +1542,7 @@ static int dwcmshc_probe(struct platform
+@@ -1468,7 +1555,7 @@ static int dwcmshc_probe(struct platform
priv->vendor_specific_area2 =
sdhci_readw(host, DWCMSHC_P_VENDOR_AREA2);