clk: qcom: dispcc-sm6115: Add missing MDSS resets

The MDSS resets were left undescribed. Add them to allow resetting the
display subsystem, which is necessary to avoid issues caused by state
left over from the bootloader on various platforms.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303034847.13870-4-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/dispcc-sm6115.c b/drivers/clk/qcom/dispcc-sm6115.c
index 8ae25d51db9463b3fb6452ca5b99662b1050f777..75bd57213079f67f8d20aef30526249ff98affb2 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm6115.c
+++ b/drivers/clk/qcom/dispcc-sm6115.c
@@ -22,6 +22,7 @@
 #include "clk-regmap-divider.h"
 #include "common.h"
 #include "gdsc.h"
+#include "reset.h"
 
 enum {
        DT_BI_TCXO,
@@ -511,6 +512,10 @@ static struct clk_branch disp_cc_sleep_clk = {
        },
 };
 
+static const struct qcom_reset_map disp_cc_sm6115_resets[] = {
+       [DISP_CC_MDSS_CORE_BCR] = { 0x2000 },
+};
+
 static struct gdsc mdss_gdsc = {
        .gdscr = 0x3000,
        .pd = {
@@ -561,6 +566,8 @@ static const struct qcom_cc_desc disp_cc_sm6115_desc = {
        .config = &disp_cc_sm6115_regmap_config,
        .clks = disp_cc_sm6115_clocks,
        .num_clks = ARRAY_SIZE(disp_cc_sm6115_clocks),
+       .resets = disp_cc_sm6115_resets,
+       .num_resets = ARRAY_SIZE(disp_cc_sm6115_resets),
        .gdscs = disp_cc_sm6115_gdscs,
        .num_gdscs = ARRAY_SIZE(disp_cc_sm6115_gdscs),
 };