Merge branches 'clk-samsung', 'clk-qcom', 'clk-round', 'clk-sai' and 'clk-cleanup...

* clk-samsung:
  clk: samsung: exynos850: Add APM-to-AP mailbox clock
  dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock
  clk: samsung: Use %pe format to simplify
  clk: samsung: pll: Fix possible truncation in a9fraco recalc rate
  clk: samsung: exynosautov920: add block G3D clock support
  dt-bindings: clock: exynosautov920: add G3D clock definitions
  clk: samsung: gs101: harmonise symbol names (clock arrays)
  clk: samsung: artpec-9: Add initial clock support for ARTPEC-9 SoC
  clk: samsung: Add clock PLL support for ARTPEC-9 SoC
  dt-bindings: clock: Add ARTPEC-9 clock controller

* clk-qcom: (67 commits)
  clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC
  clk: qcom: rpmh: Add support for Nord rpmh clocks
  clk: qcom: Add TCSR clock driver for Nord SoC
  dt-bindings: clock: qcom: Add Nord Global Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
  dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
  clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON
  clk: qcom: Constify list of critical CBCR registers
  clk: qcom: Constify qcom_cc_driver_data
  clk: qcom: videocc-glymur: Constify qcom_cc_desc
  clk: qcom: Add a driver for SM8750 GPU clocks
  dt-bindings: clock: qcom: Add SM8750 GPU clocks
  clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support
  dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074
  clk: qcom: ipq-cmn-pll: Add IPQ6018 SoC support
  dt-bindings: clock: qcom: Add CMN PLL support for IPQ6018
  clk: qcom: gdsc: Fix error path on registration of multiple pm subdomains
  dt-bindings: clock: qcom: Add missing power-domains property
  clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
  clk: qcom: dispcc-sc7180: Add missing MDSS resets
  ...

* clk-round:
  clk: divider: remove divider_round_rate() and divider_round_rate_parent()
  clk: divider: remove divider_ro_round_rate_parent()
  clk: remove round_rate() clk ops
  clk: composite: convert from round_rate() to determine_rate()
  clk: test: remove references to clk_ops.round_rate

* clk-sai:
  clk: fsl-sai: Add MCLK generation support
  clk: fsl-sai: Extract clock setup into fsl_sai_clk_register()
  dt-bindings: clock: fsl-sai: Document clock-cells = <1> support
  clk: fsl-sai: Add i.MX8M support with 8 byte register offset
  clk: fsl-sai: Sort the headers
  dt-bindings: clock: fsl-sai: Document i.MX8M support

* clk-cleanup:
  clk: visconti: pll: initialize clk_init_data to zero
  clk: xgene: Fix mapping leak in xgene_pllclk_init()
  clk: Simplify clk_is_match()
  clk: baikal-t1: Remove not-going-to-be-supported code for Baikal SoC
  clk: mvebu: armada-37xx-periph: fix __iomem casts in structure init
  clk: qoriq: avoid format string warning

diff --cc drivers/clk/Kconfig
index c46da37ff030c42f08534c4eed1a1612d99efdd1,3d803b4cf5c13d82ae936eb87ba1c225fa2ab8ce,3d803b4cf5c13d82ae936eb87ba1c225fa2ab8ce,3d803b4cf5c13d82ae936eb87ba1c225fa2ab8ce,f38dde2396149c1c0d088af439ebbb40b08dc055,ca5b2fd5bff1391abe5fc55bd7a1e563df451ce6..9f7f391a5615ab194ce30cd4ddd52f4030ac0dee
--- 1/drivers/clk/Kconfig
--- 2/drivers/clk/Kconfig
--- 3/drivers/clk/Kconfig
--- 4/drivers/clk/Kconfig
--- 5/drivers/clk/Kconfig
--- 6/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@@@@@@ -502,9 -502,8 -502,8 -502,8 -502,8 -502,7 +502,8 @@@@@@@ config COMMON_CLK_RPM
      source "drivers/clk/actions/Kconfig"
      source "drivers/clk/analogbits/Kconfig"
      source "drivers/clk/aspeed/Kconfig"
----- source "drivers/clk/baikal-t1/Kconfig"
      source "drivers/clk/bcm/Kconfig"
 +++++source "drivers/clk/eswin/Kconfig"
      source "drivers/clk/hisilicon/Kconfig"
      source "drivers/clk/imgtec/Kconfig"
      source "drivers/clk/imx/Kconfig"

diff --cc drivers/clk/Makefile
Simple merge

diff --cc drivers/clk/clk.c
Simple merge

diff --cc include/linux/clk-provider.h
Simple merge