]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amd/display: Parse freesync mccs vcp code
authorWayne Lin <Wayne.Lin@amd.com>
Tue, 3 Mar 2026 08:00:24 +0000 (16:00 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 17 Apr 2026 19:20:52 +0000 (15:20 -0400)
[Why & How]
DMUB supports to parse freesynce mccs vcp code now. Store it for
later freesync mccs manipulation.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
drivers/gpu/drm/amd/display/dc/dc_types.h

index 1d9ceb432ec37930206d120c65693549ad6e00ea..1e5953d8a90df001b8732ba931c2a984a2ec1b75 100644 (file)
@@ -13088,6 +13088,7 @@ static bool dm_edid_parser_send_cea(struct amdgpu_display_manager *dm,
                vsdb->amd_vsdb_version = output->amd_vsdb.amd_vsdb_version;
                vsdb->min_refresh_rate_hz = output->amd_vsdb.min_frame_rate;
                vsdb->max_refresh_rate_hz = output->amd_vsdb.max_frame_rate;
+               vsdb->freesync_mccs_vcp_code = output->amd_vsdb.freesync_mccs_vcp_code;
        } else {
                drm_warn(adev_to_drm(dm->adev), "Unknown EDID CEA parser results\n");
                return false;
@@ -13122,6 +13123,8 @@ static bool parse_edid_cea_dmcu(struct amdgpu_display_manager *dm,
                                vsdb_info->amd_vsdb_version = version;
                                vsdb_info->min_refresh_rate_hz = min_rate;
                                vsdb_info->max_refresh_rate_hz = max_rate;
+                               /* Not enabled on DMCU*/
+                               vsdb_info->freesync_mccs_vcp_code = 0;
                                return true;
                        }
                        /* not amd vsdb */
@@ -13333,14 +13336,19 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 
        } else if (drm_edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) {
                i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
-               if (i >= 0 && vsdb_info.freesync_supported) {
-                       amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
-                       amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
-                       if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
-                               freesync_capable = true;
+               if (i >= 0) {
+                       amdgpu_dm_connector->vsdb_info = vsdb_info;
+                       sink->edid_caps.freesync_vcp_code = vsdb_info.freesync_mccs_vcp_code;
 
-                       connector->display_info.monitor_range.min_vfreq = vsdb_info.min_refresh_rate_hz;
-                       connector->display_info.monitor_range.max_vfreq = vsdb_info.max_refresh_rate_hz;
+                       if (vsdb_info.freesync_supported) {
+                               amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
+                               amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
+                               if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
+                                       freesync_capable = true;
+
+                               connector->display_info.monitor_range.min_vfreq = vsdb_info.min_refresh_rate_hz;
+                               connector->display_info.monitor_range.max_vfreq = vsdb_info.max_refresh_rate_hz;
+                       }
                }
        }
 
@@ -13349,19 +13357,22 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 
        if (as_type == FREESYNC_TYPE_PCON_IN_WHITELIST) {
                i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
-               if (i >= 0 && vsdb_info.freesync_supported && vsdb_info.amd_vsdb_version > 0) {
-
-                       amdgpu_dm_connector->pack_sdp_v1_3 = true;
-                       amdgpu_dm_connector->as_type = as_type;
+               if (i >= 0) {
                        amdgpu_dm_connector->vsdb_info = vsdb_info;
+                       sink->edid_caps.freesync_vcp_code = vsdb_info.freesync_mccs_vcp_code;
 
-                       amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
-                       amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
-                       if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
-                               freesync_capable = true;
+                       if (vsdb_info.freesync_supported && vsdb_info.amd_vsdb_version > 0) {
+                               amdgpu_dm_connector->pack_sdp_v1_3 = true;
+                               amdgpu_dm_connector->as_type = as_type;
 
-                       connector->display_info.monitor_range.min_vfreq = vsdb_info.min_refresh_rate_hz;
-                       connector->display_info.monitor_range.max_vfreq = vsdb_info.max_refresh_rate_hz;
+                               amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
+                               amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
+                               if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
+                                       freesync_capable = true;
+
+                               connector->display_info.monitor_range.min_vfreq = vsdb_info.min_refresh_rate_hz;
+                               connector->display_info.monitor_range.max_vfreq = vsdb_info.max_refresh_rate_hz;
+                       }
                }
        }
 
index 63ce1f52b697a57235dfef52434c21042dbefc8c..8aada3e1c5b82508d0de4f4af5a0333cf816e42f 100644 (file)
@@ -758,6 +758,11 @@ struct amdgpu_hdmi_vsdb_info {
         */
        unsigned int max_refresh_rate_hz;
 
+       /**
+        * @freesync_mccs_vcp_code: MCCS VCP code for freesync state
+        */
+       unsigned int freesync_mccs_vcp_code;
+
        /**
         * @replay_mode: Replay supported
         */
index fd8ec1660312599935cdb1eddd258f507a4f9126..5b7490a7dc7af2183f9d55c066c4e3afce201475 100644 (file)
@@ -205,6 +205,8 @@ struct dc_edid_caps {
        uint32_t audio_latency;
        uint32_t video_latency;
 
+       unsigned int freesync_vcp_code;
+
        uint8_t qs_bit;
        uint8_t qy_bit;