]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
clk: mediatek: move common PARENT macros to header
authorDavid Lechner <dlechner@baylibre.com>
Fri, 6 Mar 2026 22:05:51 +0000 (16:05 -0600)
committerDavid Lechner <dlechner@baylibre.com>
Tue, 17 Mar 2026 22:28:43 +0000 (17:28 -0500)
Move repeated *_PARENT() macros from chip-specific .c files to the
common mtk-clk.h file.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-4-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
drivers/clk/mediatek/clk-mt7622.c
drivers/clk/mediatek/clk-mt7623.c
drivers/clk/mediatek/clk-mt7981.c
drivers/clk/mediatek/clk-mt7986.c
drivers/clk/mediatek/clk-mt7987.c
drivers/clk/mediatek/clk-mt7988.c
drivers/clk/mediatek/clk-mt8189.c
drivers/clk/mediatek/clk-mtk.h

index 77f3a9fc3d3f433cb5101ee1710246e5f22c38ae..077820550a5493e33c8e447b6fb1c5637f7989e7 100644 (file)
@@ -387,8 +387,6 @@ static const struct mtk_composite top_muxes[] = {
 };
 
 /* infracfg */
-#define APMIXED_PARENT(_id) PARENT(_id, CLK_PARENT_APMIXED)
-#define XTAL_PARENT(_id) PARENT(_id, CLK_PARENT_XTAL)
 
 static const struct mtk_parent infra_mux1_parents[] = {
        XTAL_PARENT(CLK_XTAL),
index d62b9651fa667b095b5e72f40f40aee50f4cfd00..4d16610f4d0d0da0921948990f05a7e0205d966e 100644 (file)
@@ -866,9 +866,6 @@ static const int peri_id_offs_map[] = {
        [CLK_PERI_FCI]                          = 48,
 };
 
-#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN)
-#define XTAL_PARENT(_id) PARENT(_id, CLK_PARENT_XTAL)
-
 static const struct mtk_parent uart_ck_sel_parents[] = {
        XTAL_PARENT(CLK_XTAL),
        TOP_PARENT(CLK_TOP_UART_SEL),
index 09ed4d8a97f88c071630f4e9b32bd63abc076ec3..40e8429521a5c513d0370cfec55ee98a6293635c 100644 (file)
@@ -319,9 +319,6 @@ static const struct mtk_fixed_factor infra_fixed_divs[] = {
 };
 
 /* INFRASYS MUX PARENTS */
-#define INFRA_PARENT(_id) PARENT(_id, CLK_PARENT_INFRASYS)
-#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN)
-#define VOID_PARENT PARENT(-1, 0)
 
 static const struct mtk_parent infra_uart0_parents[] = {
        TOP_PARENT(CLK_TOP_F26M_SEL),
index 79efbf43bc43deb3d2ddc4d0bf9861a828e0f39e..c2c216fcdf451963b3775a55d6afa8249262dab1 100644 (file)
 #define MT7986_CLK_PDN 0x250
 #define MT7986_CLK_PDN_EN_WRITE BIT(31)
 
-#define APMIXED_PARENT(_id) PARENT(_id, CLK_PARENT_APMIXED)
-#define INFRA_PARENT(_id) PARENT(_id, CLK_PARENT_INFRASYS)
-#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN)
-#define VOID_PARENT PARENT(-1, 0)
-
 #define FIXED_CLK0(_id, _rate)                                 \
        FIXED_CLK(_id, CLK_XTAL, CLK_PARENT_XTAL, _rate)
 
index 959b1c9cff69912d4fc52446afe6df23109bdcc5..641881fcb28bb3760a9adc6975d1555858168076 100644 (file)
@@ -111,8 +111,6 @@ static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
 };
 
 /* TOPCKGEN MUX PARENTS */
-#define APMIXED_PARENT(_id) PARENT(_id, CLK_PARENT_APMIXED)
-#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN)
 
 /* CLK_TOP_NETSYS_SEL (netsys_sel) in topckgen */
 static const struct mtk_parent netsys_parents[] = {
index cd8726852d7c729a8e3cefbc61148a44dc3df7c5..83f7c559e317c336cc5b797ddb9f309bcdb0b7fb 100644 (file)
@@ -94,8 +94,6 @@ static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
 };
 
 /* TOPCKGEN MUX PARENTS */
-#define APMIXED_PARENT(_id) PARENT(_id, CLK_PARENT_APMIXED)
-#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN)
 
 static const struct mtk_parent netsys_parents[] = {
        TOP_PARENT(CLK_TOP_XTAL), TOP_PARENT(CLK_TOP_NET2PLL_D2),
index 4c8b6a82c409349d832a46076594c3868d996095..60e6f53013ac1d34a22ad018863488335e1279ba 100644 (file)
@@ -427,10 +427,6 @@ static const struct mtk_fixed_factor top_fixed_divs[] = {
        FACTOR1(CLK_TOP_OSC_D20, CLK_PAD_ULPOSC, 1, 20),
 };
 
-#define EXT_PARENT(id) PARENT(id, CLK_PARENT_EXT)
-#define APMIXED_PARENT(id) PARENT(id, CLK_PARENT_APMIXED)
-#define TOP_PARENT(id) PARENT(id, CLK_PARENT_TOPCKGEN)
-
 static const struct mtk_parent axi_parents[] = {
        EXT_PARENT(CLK_PAD_CLK26M),
        TOP_PARENT(CLK_TOP_MAINPLL_D4_D4),
index 5a48f2e002dfe890cf707d8273257fafda61826c..f81e214bf009d59e049bc5be477a45cdf28b5df8 100644 (file)
@@ -129,6 +129,13 @@ struct mtk_parent {
                .flags = _flags,                        \
        }
 
+#define APMIXED_PARENT(id)     PARENT(id, CLK_PARENT_APMIXED)
+#define TOP_PARENT(id)         PARENT(id, CLK_PARENT_TOPCKGEN)
+#define INFRA_PARENT(id)       PARENT(id, CLK_PARENT_INFRASYS)
+#define XTAL_PARENT(id)                PARENT(id, CLK_PARENT_XTAL)
+#define EXT_PARENT(id)         PARENT(id, CLK_PARENT_EXT)
+#define VOID_PARENT            PARENT(-1, 0)
+
 /**
  * struct mtk_composite - aggregate clock of mux, divider and gate clocks
  *