]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
clk: qcom: rpmh: Add support for Eliza rpmh clocks
authorTaniya Das <taniya.das@oss.qualcomm.com>
Wed, 11 Mar 2026 14:46:34 +0000 (16:46 +0200)
committerBjorn Andersson <andersson@kernel.org>
Wed, 11 Mar 2026 20:32:08 +0000 (15:32 -0500)
Add the RPMH clocks present in Eliza SoC.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260311-eliza-clocks-v6-4-453c4cf657a2@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/clk-rpmh.c

index 547729b1a8ee01cf28c11ee8c4bd2f36d7536e6d..6a54481cc6ae175b8238117eefb4f38af0ec40a4 100644 (file)
@@ -372,6 +372,8 @@ DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1);
 DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1);
 
 DEFINE_CLK_RPMH_VRM(rf_clk3, _a2, "rfclka3", 2);
+DEFINE_CLK_RPMH_VRM(rf_clk4, _a2, "rfclka4", 2);
+DEFINE_CLK_RPMH_VRM(rf_clk5, _a2, "rfclka5", 2);
 
 DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1);
 DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1);
@@ -940,6 +942,29 @@ static const struct clk_rpmh_desc clk_rpmh_kaanapali = {
        .num_clks = ARRAY_SIZE(kaanapali_rpmh_clocks),
 };
 
+static struct clk_hw *eliza_rpmh_clocks[] = {
+       [RPMH_CXO_CLK]          = &clk_rpmh_bi_tcxo_div2.hw,
+       [RPMH_CXO_CLK_A]        = &clk_rpmh_bi_tcxo_div2_ao.hw,
+       [RPMH_LN_BB_CLK1]       = &clk_rpmh_clk6_a2.hw,
+       [RPMH_LN_BB_CLK1_A]     = &clk_rpmh_clk6_a2_ao.hw,
+       [RPMH_LN_BB_CLK3]       = &clk_rpmh_clk8_a2.hw,
+       [RPMH_LN_BB_CLK3_A]     = &clk_rpmh_clk8_a2_ao.hw,
+       [RPMH_RF_CLK1]          = &clk_rpmh_rf_clk1_a.hw,
+       [RPMH_RF_CLK1_A]        = &clk_rpmh_rf_clk1_a_ao.hw,
+       [RPMH_RF_CLK2]          = &clk_rpmh_rf_clk2_a.hw,
+       [RPMH_RF_CLK2_A]        = &clk_rpmh_rf_clk2_a_ao.hw,
+       [RPMH_RF_CLK4]          = &clk_rpmh_rf_clk4_a2.hw,
+       [RPMH_RF_CLK4_A]        = &clk_rpmh_rf_clk4_a2_ao.hw,
+       [RPMH_RF_CLK5]          = &clk_rpmh_rf_clk5_a2.hw,
+       [RPMH_RF_CLK5_A]        = &clk_rpmh_rf_clk5_a2_ao.hw,
+       [RPMH_IPA_CLK]          = &clk_rpmh_ipa.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_eliza = {
+       .clks = eliza_rpmh_clocks,
+       .num_clks = ARRAY_SIZE(eliza_rpmh_clocks),
+};
+
 static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
                                         void *data)
 {
@@ -1029,6 +1054,7 @@ static int clk_rpmh_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id clk_rpmh_match_table[] = {
+       { .compatible = "qcom,eliza-rpmh-clk", .data = &clk_rpmh_eliza},
        { .compatible = "qcom,glymur-rpmh-clk", .data = &clk_rpmh_glymur},
        { .compatible = "qcom,kaanapali-rpmh-clk", .data = &clk_rpmh_kaanapali},
        { .compatible = "qcom,milos-rpmh-clk", .data = &clk_rpmh_milos},