+++ /dev/null
-From ac097aecfef0bb289ca53d2fe0b73fc7e1612a05 Mon Sep 17 00:00:00 2001
-From: Thierry Reding <treding@nvidia.com>
-Date: Fri, 19 Mar 2021 14:17:22 +0100
-Subject: drm/tegra: sor: Grab runtime PM reference across reset
-
-From: Thierry Reding <treding@nvidia.com>
-
-commit ac097aecfef0bb289ca53d2fe0b73fc7e1612a05 upstream.
-
-The SOR resets are exclusively shared with the SOR power domain. This
-means that exclusive access can only be granted temporarily and in order
-for that to work, a rigorous sequence must be observed. To ensure that a
-single consumer gets exclusive access to a reset, each consumer must
-implement a rigorous protocol using the reset_control_acquire() and
-reset_control_release() functions.
-
-However, these functions alone don't provide any guarantees at the
-system level. Drivers need to ensure that the only a single consumer has
-access to the reset at the same time. In order for the SOR to be able to
-exclusively access its reset, it must therefore ensure that the SOR
-power domain is not powered off by holding on to a runtime PM reference
-to that power domain across the reset assert/deassert operation.
-
-This used to work fine by accident, but was revealed when recently more
-devices started to rely on the SOR power domain.
-
-Fixes: 11c632e1cfd3 ("drm/tegra: sor: Implement acquire/release for reset")
-Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/gpu/drm/tegra/sor.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/gpu/drm/tegra/sor.c
-+++ b/drivers/gpu/drm/tegra/sor.c
-@@ -2871,6 +2871,12 @@ static int tegra_sor_init(struct host1x_
- * kernel is possible.
- */
- if (sor->rst) {
-+ err = pm_runtime_resume_and_get(sor->dev);
-+ if (err < 0) {
-+ dev_err(sor->dev, "failed to get runtime PM: %d\n", err);
-+ return err;
-+ }
-+
- err = reset_control_acquire(sor->rst);
- if (err < 0) {
- dev_err(sor->dev, "failed to acquire SOR reset: %d\n",
-@@ -2904,6 +2910,7 @@ static int tegra_sor_init(struct host1x_
- }
-
- reset_control_release(sor->rst);
-+ pm_runtime_put(sor->dev);
- }
-
- err = clk_prepare_enable(sor->clk_safe);