mtd: spi-nor: Improve opcodes documentation

There are two status registers, named 1 and 2. The current wording is
misleading as "1" may refer to the status register ID as well as the
number of bytes required (which, in this case can be 1 or 2).

Clarify the comments by aligning them on the same pattern:
"{read,write} status {1,2} register"

Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index cdcfe0fd2e7d624bbb66fefcb87823bce300268e..90a0cf58351295c63baea4f064b49b7390337d37 100644 (file)
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -21,8 +21,8 @@
 /* Flash opcodes. */
 #define SPINOR_OP_WRDI         0x04    /* Write disable */
 #define SPINOR_OP_WREN         0x06    /* Write enable */
-#define SPINOR_OP_RDSR         0x05    /* Read status register */
-#define SPINOR_OP_WRSR         0x01    /* Write status register 1 byte */
+#define SPINOR_OP_RDSR         0x05    /* Read status register 1 */
+#define SPINOR_OP_WRSR         0x01    /* Write status register 1 */
 #define SPINOR_OP_RDSR2                0x3f    /* Read status register 2 */
 #define SPINOR_OP_WRSR2                0x3e    /* Write status register 2 */
 #define SPINOR_OP_READ         0x03    /* Read data bytes (low frequency) */