]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/dp: Use int for DSC slice count variables
authorImre Deak <imre.deak@intel.com>
Wed, 14 Jan 2026 16:22:25 +0000 (18:22 +0200)
committerImre Deak <imre.deak@intel.com>
Thu, 15 Jan 2026 18:19:05 +0000 (20:19 +0200)
There is no reason to use the more specific u8 type for slice count
variables, use the more generic int type instead.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-9-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp.c

index 4455d0a2e59cbb138994257bfc6720640df6a0e4..bd35a2ba304218e7ec774c9bac7f59b7ca4ca752 100644 (file)
@@ -963,7 +963,7 @@ static int intel_dp_dsc_min_slice_count(const struct intel_connector *connector,
                                        int mode_clock, int mode_hdisplay)
 {
        struct intel_display *display = to_intel_display(connector);
-       u8 min_slice_count;
+       int min_slice_count;
        int max_slice_width;
        int tp_rgb_yuv444;
        int tp_yuv422_420;
@@ -1008,7 +1008,7 @@ static int intel_dp_dsc_min_slice_count(const struct intel_connector *connector,
         * slice and VDSC engine, whenever we approach close enough to max CDCLK
         */
        if (mode_clock >= ((display->cdclk.max_cdclk_freq * 85) / 100))
-               min_slice_count = max_t(u8, min_slice_count, 2);
+               min_slice_count = max(min_slice_count, 2);
 
        max_slice_width = drm_dp_dsc_sink_max_slice_width(connector->dp.dsc_dpcd);
        if (max_slice_width < DP_DSC_MIN_SLICE_WIDTH_VALUE) {
@@ -1018,9 +1018,8 @@ static int intel_dp_dsc_min_slice_count(const struct intel_connector *connector,
                return 0;
        }
        /* Also take into account max slice width */
-       min_slice_count = max_t(u8, min_slice_count,
-                               DIV_ROUND_UP(mode_hdisplay,
-                                            max_slice_width));
+       min_slice_count = max(min_slice_count,
+                             DIV_ROUND_UP(mode_hdisplay, max_slice_width));
 
        return min_slice_count;
 }
@@ -1038,7 +1037,7 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
 
        /* Find the closest match to the valid slice count values */
        for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
-               u8 test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes;
+               int test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes;
 
                /*
                 * 3 DSC Slices per pipe need 3 DSC engines, which is supported only