drm/i915: Remove i915_reg.h from intel_overlay.c

Move GEN2_ISR and some interrupt definitions to common header.
This removes dependency of i915_reg.h from intel_overlay.c.

v3: Rename interrupt header with regs suffix (Jani)

v2: Create a separate file for common interrupts (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-11-uma.shankar@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 0a71840041de825ed279ae9c65404744b0f979e4..432a9c895c39870f361c97cf07deacbf92753ffb 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -5,6 +5,7 @@
 
 #include <drm/drm_print.h>
 #include <drm/drm_vblank.h>
+#include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "i915_reg.h"
 #include "icl_dsi_regs.h"

diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 0ee7295e1d4ef106a2c89f9434e044d4e79365dd..d03f554ecd7e5bebf41501a5290af34f7e333281 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -94,6 +94,8 @@
 #define   VLV_ERROR_PAGE_TABLE                         (1 << 4)
 #define   VLV_ERROR_CLAIM                              (1 << 0)
 
+#define GEN2_ISR       _MMIO(0x20ac)
+
 #define VLV_ERROR_REGS         I915_ERROR_REGS(VLV_EMR, VLV_EIR)
 
 #define _MBUS_ABOX0_CTL                        0x45038

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index ae2a3527645f1d930b5a24ce622569c6dfd3f8cf..e7838f4d2dac5d8473c6c24f7b3c6f50021ffa7c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -28,6 +28,7 @@
 
 #include <drm/drm_fourcc.h>
 #include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "gem/i915_gem_internal.h"
 #include "gem/i915_gem_object_frontbuffer.h"
@@ -37,7 +38,6 @@
 #include "gt/intel_ring.h"
 
 #include "i915_drv.h"
-#include "i915_reg.h"
 #include "intel_color_regs.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index ac527d878820be2d41265e5e6ddccd039c0b8233..d76121e117e17ca9a8e15dab8952d428ce46a41a 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -5,6 +5,7 @@
 
 #include <drm/drm_managed.h>
 #include <drm/intel/intel-gtt.h>
+#include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "gem/i915_gem_internal.h"
 #include "gem/i915_gem_lmem.h"

diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 8314a4b0505eef3d5e5df3ce4d70b9319749546c..c1797e49811d1a2fa950299adae6d47ed59aefc7 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -4,6 +4,7 @@
  */
 
 #include <drm/drm_cache.h>
+#include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "gem/i915_gem_internal.h"
 

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3fe978d4ea53922b6f9252c4dd5fe83697dab182..d4d8dd0a41749d9e461fd3fe67f576fb7ed3a85c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -34,6 +34,7 @@
 #include <drm/drm_drv.h>
 #include <drm/drm_print.h>
 #include <drm/intel/display_parent_interface.h>
+#include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "display/intel_display_irq.h"
 #include "display/intel_hotplug.h"

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2be799ffbc2b0de696187eae6f976b6e123297cc..1be8426b6a91251963434ba1b9ce882b61dd9941 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -364,7 +364,6 @@
 #define GEN2_IER       _MMIO(0x20a0)
 #define GEN2_IIR       _MMIO(0x20a4)
 #define GEN2_IMR       _MMIO(0x20a8)
-#define GEN2_ISR       _MMIO(0x20ac)
 
 #define GEN2_IRQ_REGS          I915_IRQ_REGS(GEN2_IMR, \
                                              GEN2_IER, \
@@ -521,42 +520,6 @@
 /* These are all the "old" interrupts */
 #define ILK_BSD_USER_INTERRUPT                         (1 << 5)
 
-#define I915_PM_INTERRUPT                              (1 << 31)
-#define I915_ISP_INTERRUPT                             (1 << 22)
-#define I915_LPE_PIPE_B_INTERRUPT                      (1 << 21)
-#define I915_LPE_PIPE_A_INTERRUPT                      (1 << 20)
-#define I915_MIPIC_INTERRUPT                           (1 << 19)
-#define I915_MIPIA_INTERRUPT                           (1 << 18)
-#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT             (1 << 18)
-#define I915_DISPLAY_PORT_INTERRUPT                    (1 << 17)
-#define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT           (1 << 16)
-#define I915_MASTER_ERROR_INTERRUPT                    (1 << 15)
-#define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT           (1 << 14)
-#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT       (1 << 14) /* p-state */
-#define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT           (1 << 13)
-#define I915_HWB_OOM_INTERRUPT                         (1 << 13)
-#define I915_LPE_PIPE_C_INTERRUPT                      (1 << 12)
-#define I915_SYNC_STATUS_INTERRUPT                     (1 << 12)
-#define I915_MISC_INTERRUPT                            (1 << 11)
-#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT    (1 << 11)
-#define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT           (1 << 10)
-#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT    (1 << 10)
-#define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT            (1 << 9)
-#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT      (1 << 9)
-#define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT             (1 << 8)
-#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT    (1 << 8)
-#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT           (1 << 7)
-#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT            (1 << 6)
-#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT           (1 << 5)
-#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT            (1 << 4)
-#define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT             (1 << 3)
-#define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT             (1 << 2)
-#define I915_DEBUG_INTERRUPT                           (1 << 2)
-#define I915_WINVALID_INTERRUPT                                (1 << 1)
-#define I915_USER_INTERRUPT                            (1 << 1)
-#define I915_ASLE_INTERRUPT                            (1 << 0)
-#define I915_BSD_USER_INTERRUPT                                (1 << 25)
-
 #define GEN6_BSD_RNCID                 _MMIO(0x12198)
 
 #define GEN7_FF_THREAD_MODE            _MMIO(0x20a0)

diff --git a/include/drm/intel/intel_gmd_interrupt_regs.h b/include/drm/intel/intel_gmd_interrupt_regs.h
new file mode 100644 (file)
index 0000000..dc9d5fc
--- /dev/null
+++ b/include/drm/intel/intel_gmd_interrupt_regs.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2026 Intel Corporation */
+
+#ifndef _INTEL_GMD_INTERRUPT_REGS_H_
+#define _INTEL_GMD_INTERRUPT_REGS_H_
+
+#define I915_PM_INTERRUPT                              (1 << 31)
+#define I915_ISP_INTERRUPT                             (1 << 22)
+#define I915_LPE_PIPE_B_INTERRUPT                      (1 << 21)
+#define I915_LPE_PIPE_A_INTERRUPT                      (1 << 20)
+#define I915_MIPIC_INTERRUPT                           (1 << 19)
+#define I915_MIPIA_INTERRUPT                           (1 << 18)
+#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT             (1 << 18)
+#define I915_DISPLAY_PORT_INTERRUPT                    (1 << 17)
+#define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT           (1 << 16)
+#define I915_MASTER_ERROR_INTERRUPT                    (1 << 15)
+#define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT           (1 << 14)
+#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT       (1 << 14) /* p-state */
+#define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT           (1 << 13)
+#define I915_HWB_OOM_INTERRUPT                         (1 << 13)
+#define I915_LPE_PIPE_C_INTERRUPT                      (1 << 12)
+#define I915_SYNC_STATUS_INTERRUPT                     (1 << 12)
+#define I915_MISC_INTERRUPT                            (1 << 11)
+#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT    (1 << 11)
+#define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT           (1 << 10)
+#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT    (1 << 10)
+#define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT            (1 << 9)
+#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT      (1 << 9)
+#define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT             (1 << 8)
+#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT    (1 << 8)
+#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT           (1 << 7)
+#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT            (1 << 6)
+#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT           (1 << 5)
+#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT            (1 << 4)
+#define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT             (1 << 3)
+#define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT             (1 << 2)
+#define I915_DEBUG_INTERRUPT                           (1 << 2)
+#define I915_WINVALID_INTERRUPT                                (1 << 1)
+#define I915_USER_INTERRUPT                            (1 << 1)
+#define I915_ASLE_INTERRUPT                            (1 << 0)
+#define I915_BSD_USER_INTERRUPT                                (1 << 25)
+
+#endif