drm/i915/dsc: Track the detaild DSC slice configuration

Add a way to track the detailed DSC pipes-per-line, streams-per-pipe,
slices-per-stream configuration instead of the current streams-per-pipe
and slices-per-line value. This way describes the slice configuration in
a clearer way, for instance providing a

2 pipes-per-line x 2 streams-per-pipe x 2 slices-per-stream = 8 slices-per-line

view, instead of the current, coarser

2 streams-per-pipe, 8 slices-per-line

view, the former better reflecting that each DSC stream engine has 2
slices. This also let's optimizing the configuration in a
simpler/clearer way, for instance using 1 stream x 2 slices, or 1 stream
x 4 slices instead of the current 2 stream x 1 slice, or 2 streams x 2
slices configuration (so that 1 DSC stream engine can be powered off in
each pipe).

Follow-up changes will convert the current slices-per-line computation
logic to compute instead the above detailed slice configuration.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-2-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 113e43bc1f6df3e62ce677f0574a455e06ab2b2e..7d1654f600946966678ad792f3815fd13d0a565e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1333,6 +1333,11 @@ struct intel_crtc_state {
                bool compression_enabled_on_link;
                bool compression_enable;
                int num_streams;
+               struct intel_dsc_slice_config {
+                       int pipes_per_line;
+                       int streams_per_pipe;
+                       int slices_per_stream;
+               } slice_config;
                /* Compressed Bpp in U6.4 format (first 4 bits for fractional part) */
                u16 compressed_bpp_x16;
                u8 slice_count;

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 5493082f30a75d873d9b12e0c6c917f13759fa32..f8e4b2aa6c176c21944b856ad73ec1ea6a8ab33b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -35,6 +35,11 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
        return true;
 }
 
+int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config)
+{
+       return config->pipes_per_line * config->streams_per_pipe * config->slices_per_stream;
+}
+
 static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
        struct intel_display *display = to_intel_display(crtc);

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 99f64ac54b27349f84f3ff35e25d906b218981ea..e61116d5297c89366db3375dff8f3bc9a66af5af 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -13,9 +13,11 @@ struct drm_printer;
 enum transcoder;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_dsc_slice_config;
 struct intel_encoder;
 
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
+int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config);
 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
 void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);