--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2048,8 +2048,12 @@ static void airoha_ethtool_get_mac_stats
+@@ -2160,8 +2160,12 @@ static void airoha_ethtool_get_mac_stats
airoha_update_hw_stats(port);
do {
start = u64_stats_fetch_begin(&port->stats.syncp);
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2796,6 +2796,7 @@ static const struct ethtool_ops airoha_e
+@@ -2908,6 +2908,7 @@ static const struct ethtool_ops airoha_e
.get_drvinfo = airoha_ethtool_get_drvinfo,
.get_eth_mac_stats = airoha_ethtool_get_mac_stats,
.get_rmon_stats = airoha_ethtool_get_rmon_stats,
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -514,10 +514,8 @@ static int airoha_ppe_foe_get_flow_stats
+@@ -527,10 +527,8 @@ static int airoha_ppe_foe_get_flow_stats
if (ppe_num_stats_entries < 0)
return ppe_num_stats_entries;
return 0;
}
-@@ -607,13 +605,11 @@ airoha_ppe_foe_get_entry_locked(struct a
+@@ -620,13 +618,11 @@ airoha_ppe_foe_get_entry_locked(struct a
if (hash < sram_num_entries) {
u32 *hwe = ppe->foe + hash * sizeof(struct airoha_foe_entry);
airoha_fe_wr(ppe->eth, REG_PPE_RAM_CTRL(ppe2),
FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |
PPE_SRAM_CTRL_REQ_MASK);
-@@ -691,8 +687,7 @@ static int airoha_ppe_foe_commit_entry(s
+@@ -704,8 +700,7 @@ static int airoha_ppe_foe_commit_entry(s
if (hash < sram_num_entries) {
dma_addr_t addr = ppe->foe_dma + hash * sizeof(*hwe);
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -656,6 +656,27 @@ static bool airoha_ppe_foe_compare_entry
+@@ -669,6 +669,27 @@ static bool airoha_ppe_foe_compare_entry
return !memcmp(&e->data.d, &hwe->d, len - sizeof(hwe->ib1));
}
static int airoha_ppe_foe_commit_entry(struct airoha_ppe *ppe,
struct airoha_foe_entry *e,
u32 hash, bool rx_wlan)
-@@ -685,13 +706,8 @@ static int airoha_ppe_foe_commit_entry(s
+@@ -698,13 +719,8 @@ static int airoha_ppe_foe_commit_entry(s
if (!rx_wlan)
airoha_ppe_foe_flow_stats_update(ppe, npu, hwe, hash);
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -1291,18 +1291,22 @@ static int airoha_ppe_flow_offload_cmd(s
+@@ -1304,18 +1304,22 @@ static int airoha_ppe_flow_offload_cmd(s
return -EOPNOTSUPP;
}
}
static struct airoha_npu *airoha_ppe_npu_get(struct airoha_eth *eth)
-@@ -1339,10 +1343,6 @@ static int airoha_ppe_offload_setup(stru
+@@ -1380,10 +1384,6 @@ static int airoha_ppe_offload_setup(stru
}
airoha_ppe_hw_init(ppe);
airoha_ppe_foe_flow_stats_reset(ppe, npu);
rcu_assign_pointer(eth->npu, npu);
-@@ -1513,6 +1513,10 @@ int airoha_ppe_init(struct airoha_eth *e
+@@ -1554,6 +1554,10 @@ int airoha_ppe_init(struct airoha_eth *e
if (!ppe->foe_check_time)
return -ENOMEM;
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -531,25 +531,6 @@ static int airoha_fe_init(struct airoha_
+@@ -521,25 +521,6 @@ static int airoha_fe_init(struct airoha_
/* disable IFC by default */
airoha_fe_clear(eth, REG_FE_CSR_IFC_CFG, FE_IFC_EN_MASK);
/* enable 1:N vlan action, init vlan table */
airoha_fe_set(eth, REG_MC_VLAN_EN, MC_VLAN_EN_MASK);
-@@ -1782,8 +1763,10 @@ static void airhoha_set_gdm2_loopback(st
+@@ -1853,8 +1834,10 @@ static int airhoha_set_gdm2_loopback(str
static int airoha_dev_init(struct net_device *dev)
{
struct airoha_gdm_port *port = netdev_priv(dev);
airoha_set_macaddr(port, dev->dev_addr);
-@@ -1796,16 +1779,27 @@ static int airoha_dev_init(struct net_de
+@@ -1872,16 +1855,27 @@ static int airoha_dev_init(struct net_de
fallthrough;
- case 2:
+ case AIROHA_GDM2_IDX:
if (airoha_ppe_is_enabled(eth, 1)) {
+ /* For PPE2 always use secondary cpu port. */
+ fe_cpu_port = FE_PSE_PORT_CDM2;
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -619,7 +619,8 @@ airoha_ppe_foe_get_entry_locked(struct a
+@@ -632,7 +632,8 @@ airoha_ppe_foe_get_entry_locked(struct a
REG_PPE_RAM_CTRL(ppe2)))
return NULL;
drivers/net/ethernet/airoha/airoha_npu.c | 77 ++++++++++++++++--------
1 file changed, 51 insertions(+), 26 deletions(-)
-diff --git a/drivers/net/ethernet/airoha/airoha_npu.c b/drivers/net/ethernet/airoha/airoha_npu.c
-index 8c883f2b2d36b7..41944cc5f6b062 100644
--- a/drivers/net/ethernet/airoha/airoha_npu.c
+++ b/drivers/net/ethernet/airoha/airoha_npu.c
@@ -103,6 +103,16 @@ enum {
#define MBOX_MSG_FUNC_ID GENMASK(14, 11)
#define MBOX_MSG_STATIC_BUF BIT(5)
#define MBOX_MSG_STATUS GENMASK(4, 2)
-@@ -182,49 +192,53 @@ static int airoha_npu_send_msg(struct airoha_npu *npu, int func_id,
+@@ -182,49 +192,53 @@ static int airoha_npu_send_msg(struct ai
return ret;
}
}
static irqreturn_t airoha_npu_mbox_handler(int irq, void *npu_instance)
-@@ -597,8 +611,19 @@ void airoha_npu_put(struct airoha_npu *npu)
+@@ -597,8 +611,19 @@ void airoha_npu_put(struct airoha_npu *n
}
EXPORT_SYMBOL_GPL(airoha_npu_put);
#define NPU_EN7581_FIRMWARE_RV32_MAX_SIZE 0x200000
#define NPU_EN7581_FIRMWARE_DATA_MAX_SIZE 0x10000
#define NPU_DUMP_SIZE 512
-@@ -621,8 +623,20 @@ static const struct airoha_npu_soc_data
+@@ -622,8 +624,20 @@ static const struct airoha_npu_soc_data
},
};
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, of_airoha_npu_match);
-@@ -768,6 +782,8 @@ module_platform_driver(airoha_npu_driver
+@@ -762,6 +776,8 @@ module_platform_driver(airoha_npu_driver
MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);
MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
-@@ -54,6 +54,16 @@ config PWM_ADP5585
+@@ -63,6 +63,16 @@ config PWM_ADP5585
This option enables support for the PWM function found in the Analog
Devices ADP5585.
obj-$(CONFIG_PWM_ADP5585) += pwm-adp5585.o
+obj-$(CONFIG_PWM_AIROHA) += pwm-airoha.o
obj-$(CONFIG_PWM_APPLE) += pwm-apple.o
+ obj-$(CONFIG_PWM_ARGON_FAN_HAT) += pwm-argon-fan-hat.o
obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o
- obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o
--- /dev/null
+++ b/drivers/pwm/pwm-airoha.c
@@ -0,0 +1,622 @@
drivers/pinctrl/mediatek/pinctrl-airoha.c | 567 ++++++++++++----------
1 file changed, 318 insertions(+), 249 deletions(-)
-diff --git a/drivers/pinctrl/mediatek/pinctrl-airoha.c b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-index f1cf2578fe423e..32e5c1b32d5071 100644
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
@@ -30,15 +30,15 @@
PINCTRL_PIN(0, "uart1_txd"),
PINCTRL_PIN(1, "uart1_rxd"),
PINCTRL_PIN(2, "i2c_scl"),
-@@ -427,172 +457,172 @@ static struct pinctrl_pin_desc airoha_pinctrl_pins[] = {
+@@ -427,172 +457,172 @@ static struct pinctrl_pin_desc airoha_pi
PINCTRL_PIN(63, "pcie_reset2"),
};
};
static const char *const pon_groups[] = { "pon" };
-@@ -1955,33 +1985,33 @@ static const struct airoha_pinctrl_func_group phy4_led1_func_group[] = {
+@@ -1955,33 +1985,33 @@ static const struct airoha_pinctrl_func_
},
};
PINCTRL_CONF_DESC(0, REG_I2C_SDA_PU, UART1_TXD_PU_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_PU, UART1_RXD_PU_MASK),
PINCTRL_CONF_DESC(2, REG_I2C_SDA_PU, I2C_SDA_PU_MASK),
-@@ -2042,7 +2072,7 @@ static const struct airoha_pinctrl_conf airoha_pinctrl_pullup_conf[] = {
+@@ -2042,7 +2072,7 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_PU, PCIE2_RESET_PU_MASK),
};
PINCTRL_CONF_DESC(0, REG_I2C_SDA_PD, UART1_TXD_PD_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_PD, UART1_RXD_PD_MASK),
PINCTRL_CONF_DESC(2, REG_I2C_SDA_PD, I2C_SDA_PD_MASK),
-@@ -2103,7 +2133,7 @@ static const struct airoha_pinctrl_conf airoha_pinctrl_pulldown_conf[] = {
+@@ -2103,7 +2133,7 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_PD, PCIE2_RESET_PD_MASK),
};
PINCTRL_CONF_DESC(0, REG_I2C_SDA_E2, UART1_TXD_E2_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_E2, UART1_RXD_E2_MASK),
PINCTRL_CONF_DESC(2, REG_I2C_SDA_E2, I2C_SDA_E2_MASK),
-@@ -2164,7 +2194,7 @@ static const struct airoha_pinctrl_conf airoha_pinctrl_drive_e2_conf[] = {
+@@ -2164,7 +2194,7 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_E2, PCIE2_RESET_E2_MASK),
};
PINCTRL_CONF_DESC(0, REG_I2C_SDA_E4, UART1_TXD_E4_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_E4, UART1_RXD_E4_MASK),
PINCTRL_CONF_DESC(2, REG_I2C_SDA_E4, I2C_SDA_E4_MASK),
-@@ -2225,7 +2255,7 @@ static const struct airoha_pinctrl_conf airoha_pinctrl_drive_e4_conf[] = {
+@@ -2225,7 +2255,7 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_E4, PCIE2_RESET_E4_MASK),
};
PINCTRL_CONF_DESC(61, REG_PCIE_RESET_OD, PCIE0_RESET_OD_MASK),
PINCTRL_CONF_DESC(62, REG_PCIE_RESET_OD, PCIE1_RESET_OD_MASK),
PINCTRL_CONF_DESC(63, REG_PCIE_RESET_OD, PCIE2_RESET_OD_MASK),
-@@ -2546,12 +2576,17 @@ airoha_pinctrl_get_conf_reg(const struct airoha_pinctrl_conf *conf,
+@@ -2546,12 +2576,17 @@ airoha_pinctrl_get_conf_reg(const struct
}
static int airoha_pinctrl_get_conf(struct airoha_pinctrl *pinctrl,
if (!reg)
return -EINVAL;
-@@ -2564,12 +2599,17 @@ static int airoha_pinctrl_get_conf(struct airoha_pinctrl *pinctrl,
+@@ -2564,12 +2599,17 @@ static int airoha_pinctrl_get_conf(struc
}
static int airoha_pinctrl_set_conf(struct airoha_pinctrl *pinctrl,
if (!reg)
return -EINVAL;
-@@ -2582,44 +2622,34 @@ static int airoha_pinctrl_set_conf(struct airoha_pinctrl *pinctrl,
+@@ -2582,44 +2622,34 @@ static int airoha_pinctrl_set_conf(struc
}
#define airoha_pinctrl_get_pullup_conf(pinctrl, pin, val) \
(pin), (val))
static int airoha_pinconf_get_direction(struct pinctrl_dev *pctrl_dev, u32 p)
-@@ -2796,12 +2826,13 @@ static int airoha_pinconf_set(struct pinctrl_dev *pctrl_dev,
+@@ -2796,12 +2826,13 @@ static int airoha_pinconf_set(struct pin
static int airoha_pinconf_group_get(struct pinctrl_dev *pctrl_dev,
unsigned int group, unsigned long *config)
{
config))
return -ENOTSUPP;
-@@ -2818,13 +2849,14 @@ static int airoha_pinconf_group_set(struct pinctrl_dev *pctrl_dev,
+@@ -2818,13 +2849,14 @@ static int airoha_pinconf_group_set(stru
unsigned int group, unsigned long *configs,
unsigned int num_configs)
{
configs, num_configs);
if (err)
return err;
-@@ -2850,23 +2882,16 @@ static const struct pinctrl_ops airoha_pctlops = {
+@@ -2850,23 +2882,16 @@ static const struct pinctrl_ops airoha_p
.dt_free_map = pinconf_generic_dt_free_map,
};
pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL);
if (!pinctrl)
return -ENOMEM;
-@@ -2881,14 +2906,23 @@ static int airoha_pinctrl_probe(struct platform_device *pdev)
+@@ -2881,14 +2906,23 @@ static int airoha_pinctrl_probe(struct p
pinctrl->chip_scu = map;
err = pinctrl_generic_add_group(pinctrl->ctrl, grp->name,
grp->pins, grp->npins,
-@@ -2901,10 +2935,10 @@ static int airoha_pinctrl_probe(struct platform_device *pdev)
+@@ -2901,10 +2935,10 @@ static int airoha_pinctrl_probe(struct p
}
/* build functions */
err = pinmux_generic_add_pinfunction(pinctrl->ctrl,
&func->desc,
(void *)func);
-@@ -2915,6 +2949,10 @@ static int airoha_pinctrl_probe(struct platform_device *pdev)
+@@ -2915,6 +2949,10 @@ static int airoha_pinctrl_probe(struct p
}
}
err = pinctrl_enable(pinctrl->ctrl);
if (err)
return err;
-@@ -2923,8 +2961,39 @@ static int airoha_pinctrl_probe(struct platform_device *pdev)
+@@ -2923,8 +2961,39 @@ static int airoha_pinctrl_probe(struct p
return airoha_pinctrl_add_gpiochip(pinctrl, pdev);
}
drivers/pinctrl/mediatek/pinctrl-airoha.c | 588 ++++------------------
1 file changed, 100 insertions(+), 488 deletions(-)
-diff --git a/drivers/pinctrl/mediatek/pinctrl-airoha.c b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-index 32e5c1b32d5071..cb0edc2a66a1e6 100644
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -1473,516 +1473,128 @@ static const struct airoha_pinctrl_func_group pwm_func_group[] = {
+@@ -1473,516 +1473,128 @@ static const struct airoha_pinctrl_func_
},
};
drivers/pinctrl/mediatek/pinctrl-airoha.c | 465 ++++------------------
1 file changed, 68 insertions(+), 397 deletions(-)
-diff --git a/drivers/pinctrl/mediatek/pinctrl-airoha.c b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-index cb0edc2a66a1e6..f3cf48bdd1f83d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -1073,404 +1073,75 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
+@@ -1073,404 +1073,75 @@ static const struct airoha_pinctrl_func_
};
/* PWM */
drivers/pinctrl/mediatek/pinctrl-airoha.c | 747 +++++++++++++++++++++-
1 file changed, 740 insertions(+), 7 deletions(-)
-diff --git a/drivers/pinctrl/mediatek/pinctrl-airoha.c b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-index f3cf48bdd1f83d..bfcedc7f920b1e 100644
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
@@ -70,6 +70,7 @@
#define UART1_RXD_PD_MASK BIT(3)
#define UART1_TXD_PD_MASK BIT(2)
#define I2C_SCL_PD_MASK BIT(1)
-@@ -625,10 +642,223 @@ static const struct pingroup en7581_pinctrl_groups[] = {
+@@ -625,10 +642,223 @@ static const struct pingroup en7581_pinc
PINCTRL_PIN_GROUP("pcie_reset2", en7581_pcie_reset2),
};
static const char *const uart_groups[] = { "uart2", "uart2_cts_rts", "hsuart",
"hsuart_cts_rts", "uart4",
"uart5" };
-@@ -641,11 +871,16 @@ static const char *const pcm_spi_groups[] = { "pcm_spi", "pcm_spi_int",
+@@ -641,11 +871,16 @@ static const char *const pcm_spi_groups[
"pcm_spi_cs2_p156",
"pcm_spi_cs2_p128",
"pcm_spi_cs3", "pcm_spi_cs4" };
static const char *const pwm_groups[] = { "gpio0", "gpio1",
"gpio2", "gpio3",
"gpio4", "gpio5",
-@@ -684,6 +919,22 @@ static const char *const phy3_led1_groups[] = { "gpio43", "gpio44",
+@@ -684,6 +919,22 @@ static const char *const phy3_led1_group
"gpio45", "gpio46" };
static const char *const phy4_led1_groups[] = { "gpio43", "gpio44",
"gpio45", "gpio46" };
static const struct airoha_pinctrl_func_group pon_func_group[] = {
{
-@@ -761,6 +1012,25 @@ static const struct airoha_pinctrl_func_group mdio_func_group[] = {
+@@ -761,6 +1012,25 @@ static const struct airoha_pinctrl_func_
},
};
static const struct airoha_pinctrl_func_group uart_func_group[] = {
{
.name = "uart2",
-@@ -1002,6 +1272,73 @@ static const struct airoha_pinctrl_func_group pcm_spi_func_group[] = {
+@@ -1002,6 +1272,73 @@ static const struct airoha_pinctrl_func_
},
};
static const struct airoha_pinctrl_func_group i2s_func_group[] = {
{
.name = "i2s",
-@@ -1072,6 +1409,28 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
+@@ -1072,6 +1409,28 @@ static const struct airoha_pinctrl_func_
},
};
/* PWM */
#define AIROHA_PINCTRL_PWM(gpio, mux_val) \
{ \
-@@ -1268,6 +1627,94 @@ static const struct airoha_pinctrl_func_group phy4_led1_func_group[] = {
+@@ -1268,6 +1627,94 @@ static const struct airoha_pinctrl_func_
LAN3_LED_MAPPING_MASK, LAN3_PHY_LED_MAP(2)),
};
static const struct airoha_pinctrl_func en7581_pinctrl_funcs[] = {
PINCTRL_FUNC_DESC("pon", pon),
PINCTRL_FUNC_DESC("tod_1pps", tod_1pps),
-@@ -1294,6 +1741,31 @@ static const struct airoha_pinctrl_func en7581_pinctrl_funcs[] = {
+@@ -1294,6 +1741,31 @@ static const struct airoha_pinctrl_func
PINCTRL_FUNC_DESC("phy4_led1", phy4_led1),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_pullup_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_PU, UART1_TXD_PU_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_PU, UART1_RXD_PU_MASK),
-@@ -1355,6 +1827,62 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_pullup_conf[] = {
+@@ -1355,6 +1827,62 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_PU, PCIE2_RESET_PU_MASK),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_pulldown_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_PD, UART1_TXD_PD_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_PD, UART1_RXD_PD_MASK),
-@@ -1416,6 +1944,62 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_pulldown_conf[] = {
+@@ -1416,6 +1944,62 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_PD, PCIE2_RESET_PD_MASK),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e2_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_E2, UART1_TXD_E2_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_E2, UART1_RXD_E2_MASK),
-@@ -1477,6 +2061,62 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e2_conf[] = {
+@@ -1477,6 +2061,62 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_E2, PCIE2_RESET_E2_MASK),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e4_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_E4, UART1_TXD_E4_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_E4, UART1_RXD_E4_MASK),
-@@ -1538,12 +2178,73 @@ static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e4_conf[] = {
+@@ -1538,12 +2178,73 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_E4, PCIE2_RESET_E4_MASK),
};
static int airoha_convert_pin_to_reg_offset(struct pinctrl_dev *pctrl_dev,
struct pinctrl_gpio_range *range,
int pin)
-@@ -1708,7 +2409,7 @@ static const struct irq_chip airoha_gpio_irq_chip = {
+@@ -1708,7 +2409,7 @@ static const struct irq_chip airoha_gpio
};
static int airoha_pinctrl_add_gpiochip(struct airoha_pinctrl *pinctrl,
{
struct airoha_pinctrl_gpiochip *chip = &pinctrl->gpiochip;
struct gpio_chip *gc = &chip->chip;
-@@ -1743,7 +2444,7 @@ static int airoha_pinctrl_add_gpiochip(struct airoha_pinctrl *pinctrl,
+@@ -1743,7 +2444,7 @@ static int airoha_pinctrl_add_gpiochip(s
return irq;
err = devm_request_irq(dev, irq, airoha_irq_handler, IRQF_SHARED,
if (err) {
dev_err(dev, "error requesting irq %d: %d\n", irq, err);
return err;
-@@ -1807,8 +2508,8 @@ static int airoha_pinmux_set_mux(struct pinctrl_dev *pctrl_dev,
+@@ -1807,8 +2508,8 @@ static int airoha_pinmux_set_mux(struct
}
static int airoha_pinmux_set_direction(struct pinctrl_dev *pctrl_dev,
{
struct airoha_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
u32 mask, index;
-@@ -1898,7 +2599,7 @@ static int airoha_pinctrl_set_conf(struct airoha_pinctrl *pinctrl,
+@@ -1898,7 +2599,7 @@ static int airoha_pinctrl_set_conf(struc
if (regmap_update_bits(pinctrl->chip_scu, reg->offset, reg->mask,
return -EINVAL;
return 0;
-@@ -2115,8 +2816,8 @@ static int airoha_pinconf_group_get(struct pinctrl_dev *pctrl_dev,
+@@ -2115,8 +2816,8 @@ static int airoha_pinconf_group_get(stru
for (i = 0; i < pinctrl->grps[group].npins; i++) {
if (airoha_pinconf_get(pctrl_dev,
return -ENOTSUPP;
if (i && cur_config != *config)
-@@ -2275,8 +2976,40 @@ static const struct airoha_pinctrl_match_data en7581_pinctrl_match_data = {
+@@ -2275,8 +2976,40 @@ static const struct airoha_pinctrl_match
},
};
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -2998,7 +2998,7 @@ static const struct airoha_pinctrl_match
+@@ -2993,7 +2993,7 @@ static const struct airoha_pinctrl_match
.num_confs = ARRAY_SIZE(an7583_pinctrl_pulldown_conf),
},
[AIROHA_PINCTRL_CONFS_DRIVE_E2] = {
--- a/drivers/net/ethernet/airoha/airoha_npu.c
+++ b/drivers/net/ethernet/airoha/airoha_npu.c
-@@ -658,6 +658,7 @@ static int airoha_npu_probe(struct platf
- struct device_node *np;
+@@ -657,6 +657,7 @@ static int airoha_npu_probe(struct platf
+ struct resource res;
void __iomem *base;
int i, irq, err;
+ u32 val;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
-@@ -757,6 +758,11 @@ static int airoha_npu_probe(struct platf
+@@ -750,6 +751,11 @@ static int airoha_npu_probe(struct platf
regmap_write(npu->regmap, REG_CR_BOOT_TRIGGER, 0x1);
msleep(100);
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2826,6 +2826,7 @@ static const struct ethtool_ops airoha_e
+@@ -2902,6 +2902,7 @@ static const struct ethtool_ops airoha_e
.get_drvinfo = airoha_ethtool_get_drvinfo,
.get_eth_mac_stats = airoha_ethtool_get_mac_stats,
.get_rmon_stats = airoha_ethtool_get_rmon_stats,
+}
+
static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,
- struct reserved_mem *rmem)
+ struct resource *res)
{
@@ -233,14 +257,22 @@ static int airoha_npu_run_firmware(struc
if (IS_ERR(addr))
}
static irqreturn_t airoha_npu_mbox_handler(int irq, void *npu_instance)
-@@ -797,6 +829,8 @@ module_platform_driver(airoha_npu_driver
+@@ -790,6 +822,8 @@ module_platform_driver(airoha_npu_driver
MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);
MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1748,7 +1748,7 @@ static int airhoha_set_gdm2_loopback(str
+@@ -1821,7 +1821,7 @@ static int airhoha_set_gdm2_loopback(str
airoha_fe_rmw(eth,
REG_SP_DFT_CPORT(src_port >> fls(SP_CPORT_DFT_MASK)),
SP_CPORT_MASK(val),
if (port->id != AIROHA_GDM3_IDX && airoha_is_7581(eth))
airoha_fe_rmw(eth, REG_SRC_PORT_FC_MAP6,
-@@ -1802,7 +1802,7 @@ static int airoha_dev_init(struct net_de
+@@ -1875,7 +1875,7 @@ static int airoha_dev_init(struct net_de
ppe_id = pse_port == FE_PSE_PORT_PPE2 ? 1 : 0;
airoha_fe_rmw(eth, REG_PPE_DFT_CPORT0(ppe_id),
DFT_CPORT_MASK(port->id),
return 0;
}
-@@ -2159,7 +2159,7 @@ static int airoha_qdma_set_chan_tx_sched
+@@ -2235,7 +2235,7 @@ static int airoha_qdma_set_chan_tx_sched
airoha_qdma_rmw(port->qdma, REG_CHAN_QOS_MODE(channel >> 3),
CHAN_QOS_MODE_MASK(channel),
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1750,10 +1750,12 @@ static int airhoha_set_gdm2_loopback(str
+@@ -1823,10 +1823,12 @@ static int airhoha_set_gdm2_loopback(str
SP_CPORT_MASK(val),
__field_prep(SP_CPORT_MASK(val), FE_PSE_PORT_CDM2));
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1632,6 +1632,7 @@ static int airoha_dev_open(struct net_de
+@@ -1708,6 +1708,7 @@ static int airoha_dev_open(struct net_de
int err, len = ETH_HLEN + dev->mtu + ETH_FCS_LEN;
struct airoha_gdm_port *port = netdev_priv(dev);
struct airoha_qdma *qdma = port->qdma;
netif_tx_start_all_queues(dev);
err = airoha_set_vip_for_gdm_port(port, true);
-@@ -1655,6 +1656,14 @@ static int airoha_dev_open(struct net_de
+@@ -1731,6 +1732,14 @@ static int airoha_dev_open(struct net_de
GLOBAL_CFG_RX_DMA_EN_MASK);
atomic_inc(&qdma->users);
return 0;
}
-@@ -1672,6 +1681,9 @@ static int airoha_dev_stop(struct net_de
- for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++)
+@@ -1745,6 +1754,9 @@ static int airoha_dev_stop(struct net_de
+ for (i = 0; i < dev->num_tx_queues; i++)
netdev_tx_reset_subqueue(dev, i);
+ airoha_set_gdm_port_fwd_cfg(qdma->eth, REG_GDM_FWD_CFG(port->id),
if (atomic_dec_and_test(&qdma->users)) {
airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,
GLOBAL_CFG_TX_DMA_EN_MASK |
-@@ -1765,7 +1777,7 @@ static int airoha_dev_init(struct net_de
+@@ -1838,7 +1850,7 @@ static int airoha_dev_init(struct net_de
struct airoha_gdm_port *port = netdev_priv(dev);
struct airoha_qdma *qdma = port->qdma;
struct airoha_eth *eth = qdma->eth;
u8 ppe_id;
airoha_set_macaddr(port, dev->dev_addr);
-@@ -1786,7 +1798,7 @@ static int airoha_dev_init(struct net_de
+@@ -1859,7 +1871,7 @@ static int airoha_dev_init(struct net_de
if (airoha_ppe_is_enabled(eth, 1)) {
/* For PPE2 always use secondary cpu port. */
fe_cpu_port = FE_PSE_PORT_CDM2;
break;
}
fallthrough;
-@@ -1795,13 +1807,11 @@ static int airoha_dev_init(struct net_de
+@@ -1868,13 +1880,11 @@ static int airoha_dev_init(struct net_de
/* For PPE1 select cpu port according to the running QDMA. */
fe_cpu_port = qdma_id ? FE_PSE_PORT_CDM2 : FE_PSE_PORT_CDM1;
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1775,11 +1775,13 @@ static int airhoha_set_gdm2_loopback(str
+@@ -1848,11 +1848,13 @@ static int airhoha_set_gdm2_loopback(str
static int airoha_dev_init(struct net_device *dev)
{
struct airoha_gdm_port *port = netdev_priv(dev);
airoha_set_macaddr(port, dev->dev_addr);
switch (port->id) {
-@@ -1803,7 +1805,7 @@ static int airoha_dev_init(struct net_de
+@@ -1876,7 +1878,7 @@ static int airoha_dev_init(struct net_de
}
fallthrough;
default: {
/* For PPE1 select cpu port according to the running QDMA. */
fe_cpu_port = qdma_id ? FE_PSE_PORT_CDM2 : FE_PSE_PORT_CDM1;
-@@ -2887,11 +2889,10 @@ bool airoha_is_valid_gdm_port(struct air
+@@ -2963,11 +2965,10 @@ bool airoha_is_valid_gdm_port(struct air
}
static int airoha_alloc_gdm_port(struct airoha_eth *eth,
struct net_device *dev;
int err, p;
u32 id;
-@@ -2922,7 +2923,6 @@ static int airoha_alloc_gdm_port(struct
+@@ -2998,7 +2999,6 @@ static int airoha_alloc_gdm_port(struct
return -ENOMEM;
}
dev->netdev_ops = &airoha_netdev_ops;
dev->ethtool_ops = &airoha_ethtool_ops;
dev->max_mtu = AIROHA_MAX_MTU;
-@@ -2934,7 +2934,6 @@ static int airoha_alloc_gdm_port(struct
+@@ -3010,7 +3010,6 @@ static int airoha_alloc_gdm_port(struct
dev->features |= dev->hw_features;
dev->vlan_features = dev->hw_features;
dev->dev.of_node = np;
SET_NETDEV_DEV(dev, eth->dev);
/* reserve hw queues for HTB offloading */
-@@ -2955,7 +2954,7 @@ static int airoha_alloc_gdm_port(struct
+@@ -3031,7 +3030,7 @@ static int airoha_alloc_gdm_port(struct
port = netdev_priv(dev);
u64_stats_init(&port->stats.syncp);
spin_lock_init(&port->stats.lock);
+ port->eth = eth;
port->dev = dev;
port->id = id;
- eth->ports[p] = port;
-@@ -3055,7 +3054,6 @@ static int airoha_probe(struct platform_
+ /* XXX: Read nbq from DTS */
+@@ -3133,7 +3132,6 @@ static int airoha_probe(struct platform_
for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
airoha_qdma_start_napi(ð->qdma[i]);
for_each_child_of_node(pdev->dev.of_node, np) {
if (!of_device_is_compatible(np, "airoha,eth-mac"))
continue;
-@@ -3063,7 +3061,7 @@ static int airoha_probe(struct platform_
+@@ -3141,7 +3139,7 @@ static int airoha_probe(struct platform_
if (!of_device_is_available(np))
continue;
goto error_napi_stop;
--- a/drivers/net/ethernet/airoha/airoha_eth.h
+++ b/drivers/net/ethernet/airoha/airoha_eth.h
-@@ -533,6 +533,7 @@ struct airoha_qdma {
+@@ -534,6 +534,7 @@ struct airoha_qdma {
struct airoha_gdm_port {
struct airoha_qdma *qdma;
+ struct airoha_eth *eth;
struct net_device *dev;
int id;
-
+ int nbq;
--- a/drivers/net/phy/mediatek/mtk-ge-soc.c
+++ b/drivers/net/phy/mediatek/mtk-ge-soc.c
-@@ -1492,6 +1492,8 @@ static struct phy_driver mtk_socphy_driv
+@@ -1508,6 +1508,8 @@ static struct phy_driver mtk_socphy_driv
{
PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581),
.name = "Airoha AN7581 PHY",
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1776,8 +1776,7 @@ static int airoha_dev_init(struct net_de
+@@ -1849,8 +1849,7 @@ static int airoha_dev_init(struct net_de
{
struct airoha_gdm_port *port = netdev_priv(dev);
struct airoha_eth *eth = port->eth;
/* QDMA0 is used for lan ports while QDMA1 is used for WAN ports */
port->qdma = ð->qdma[!airoha_is_lan_gdm_port(port)];
-@@ -1795,28 +1794,13 @@ static int airoha_dev_init(struct net_de
+@@ -1868,28 +1867,13 @@ static int airoha_dev_init(struct net_de
if (err)
return err;
}
return 0;
}
-@@ -1919,7 +1903,7 @@ static u32 airoha_get_dsa_tag(struct sk_
+@@ -1992,7 +1976,7 @@ static u32 airoha_get_dsa_tag(struct sk_
#endif
}
struct airoha_eth *eth = qdma->eth;
--- a/drivers/net/ethernet/airoha/airoha_eth.h
+++ b/drivers/net/ethernet/airoha/airoha_eth.h
-@@ -646,9 +646,11 @@ static inline bool airoha_is_7583(struct
+@@ -654,9 +654,11 @@ static inline bool airoha_is_7583(struct
return eth->soc->version == 0x7583;
}
static void airoha_ppe_hw_init(struct airoha_ppe *ppe)
{
u32 sram_ppe_num_data_entries = PPE_SRAM_NUM_ENTRIES, sram_num_entries;
-@@ -147,7 +161,9 @@ static void airoha_ppe_hw_init(struct ai
-
- airoha_fe_wr(eth, REG_PPE_HASH_SEED(i), PPE_HASH_SEED);
+@@ -155,7 +169,9 @@ static void airoha_ppe_hw_init(struct ai
+ airoha_fe_clear(eth, REG_PPE_PPE_FLOW_CFG(i),
+ PPE_FLOW_CFG_IP6_6RD_MASK);
- for (p = 0; p < ARRAY_SIZE(eth->ports); p++)
+ for (p = 0; p < ARRAY_SIZE(eth->ports); p++) {
airoha_fe_rmw(eth, REG_PPE_MTU(i, p),
FP0_EGRESS_MTU_MASK |
FP1_EGRESS_MTU_MASK,
-@@ -155,6 +171,11 @@ static void airoha_ppe_hw_init(struct ai
+@@ -163,6 +179,11 @@ static void airoha_ppe_hw_init(struct ai
AIROHA_MAX_MTU) |
FIELD_PREP(FP1_EGRESS_MTU_MASK,
AIROHA_MAX_MTU));
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2978,6 +2978,8 @@ static int airoha_register_gdm_devices(s
+@@ -3040,6 +3040,8 @@ static int airoha_register_gdm_devices(s
return err;
}
enum {
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -1387,6 +1387,13 @@ int airoha_ppe_setup_tc_block_cb(struct
+@@ -1425,6 +1425,13 @@ int airoha_ppe_setup_tc_block_cb(struct
struct airoha_eth *eth = ppe->eth;
int err = 0;
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2683,7 +2683,7 @@ static int airoha_dev_setup_tc_block_cb(
+@@ -2752,7 +2752,7 @@ static int airoha_dev_setup_tc_block_cb(
}
}
struct flow_block_offload *f)
{
flow_setup_cb_t *cb = airoha_dev_setup_tc_block_cb;
-@@ -2696,12 +2696,12 @@ static int airoha_dev_setup_tc_block(str
+@@ -2765,12 +2765,12 @@ static int airoha_dev_setup_tc_block(str
f->driver_block_list = &block_cb_list;
switch (f->command) {
case FLOW_BLOCK_BIND:
if (IS_ERR(block_cb))
return PTR_ERR(block_cb);
-@@ -2710,7 +2710,7 @@ static int airoha_dev_setup_tc_block(str
+@@ -2779,7 +2779,7 @@ static int airoha_dev_setup_tc_block(str
list_add_tail(&block_cb->driver_list, &block_cb_list);
return 0;
case FLOW_BLOCK_UNBIND:
if (!block_cb)
return -ENOENT;
-@@ -2809,7 +2809,7 @@ static int airoha_dev_tc_setup(struct ne
+@@ -2878,7 +2878,7 @@ static int airoha_dev_tc_setup(struct ne
return airoha_tc_setup_qdisc_htb(port, type_data);
case TC_SETUP_BLOCK:
case TC_SETUP_FT:
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2488,10 +2488,11 @@ static int airoha_qdma_set_trtcm_token_b
+@@ -2557,10 +2557,11 @@ static int airoha_qdma_set_trtcm_token_b
mode, val);
}
int i, err;
for (i = 0; i <= TRTCM_PEAK_MODE; i++) {
-@@ -2511,21 +2512,20 @@ static int airoha_qdma_set_tx_rate_limit
+@@ -2580,21 +2581,20 @@ static int airoha_qdma_set_tx_rate_limit
return 0;
}
if (err) {
NL_SET_ERR_MSG_MOD(opt->extack,
"failed configuring htb offload");
-@@ -2537,7 +2537,7 @@ static int airoha_tc_htb_alloc_leaf_queu
+@@ -2606,7 +2606,7 @@ static int airoha_tc_htb_alloc_leaf_queu
err = netif_set_real_num_tx_queues(dev, num_tx_queues + 1);
if (err) {
NL_SET_ERR_MSG_MOD(opt->extack,
"failed setting real_num_tx_queues");
return err;
-@@ -2724,44 +2724,47 @@ static int airoha_dev_setup_tc_block(str
+@@ -2793,44 +2793,47 @@ static int airoha_dev_setup_tc_block(str
}
}
if (!test_bit(channel, port->qos_sq_bmap)) {
NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
-@@ -2773,23 +2776,23 @@ static int airoha_tc_get_htb_get_leaf_qu
+@@ -2842,23 +2845,23 @@ static int airoha_tc_get_htb_get_leaf_qu
return 0;
}
default:
return -EOPNOTSUPP;
}
-@@ -2806,7 +2809,7 @@ static int airoha_dev_tc_setup(struct ne
+@@ -2875,7 +2878,7 @@ static int airoha_dev_tc_setup(struct ne
case TC_SETUP_QDISC_ETS:
return airoha_tc_setup_qdisc_ets(port, type_data);
case TC_SETUP_QDISC_HTB:
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2134,10 +2134,11 @@ airoha_ethtool_get_rmon_stats(struct net
+@@ -2203,10 +2203,11 @@ airoha_ethtool_get_rmon_stats(struct net
} while (u64_stats_fetch_retry(&port->stats.syncp, start));
}
int i;
for (i = 0; i < AIROHA_NUM_TX_RING; i++)
-@@ -2169,17 +2170,15 @@ static int airoha_qdma_set_chan_tx_sched
+@@ -2238,17 +2239,15 @@ static int airoha_qdma_set_chan_tx_sched
return 0;
}
struct tc_ets_qopt_offload *opt)
{
struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
-@@ -2220,20 +2219,21 @@ static int airoha_qdma_set_tx_ets_sched(
+@@ -2289,20 +2288,21 @@ static int airoha_qdma_set_tx_ets_sched(
else if (nstrict < AIROHA_NUM_QOS_QUEUES - 1)
mode = nstrict + 1;
_bstats_update(opt->stats.bstats, 0, tx_packets);
port->cpu_tx_packets = cpu_tx_packets;
-@@ -2242,7 +2242,7 @@ static int airoha_qdma_get_tx_ets_stats(
+@@ -2311,7 +2311,7 @@ static int airoha_qdma_get_tx_ets_stats(
return 0;
}
struct tc_ets_qopt_offload *opt)
{
int channel;
-@@ -2255,12 +2255,12 @@ static int airoha_tc_setup_qdisc_ets(str
+@@ -2324,12 +2324,12 @@ static int airoha_tc_setup_qdisc_ets(str
switch (opt->command) {
case TC_ETS_REPLACE:
default:
return -EOPNOTSUPP;
}
-@@ -2803,11 +2803,9 @@ static int airoha_tc_setup_qdisc_htb(str
+@@ -2872,11 +2872,9 @@ static int airoha_tc_setup_qdisc_htb(str
static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
void *type_data)
{
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1722,7 +1722,7 @@ static int airoha_dev_set_macaddr(struct
+@@ -1786,7 +1786,7 @@ static int airoha_dev_set_macaddr(struct
return 0;
}
{
struct airoha_eth *eth = port->qdma->eth;
u32 val, pse_port, chan;
-@@ -1796,7 +1796,7 @@ static int airoha_dev_init(struct net_de
+@@ -1862,7 +1862,7 @@ static int airoha_dev_init(struct net_de
if (!eth->ports[1]) {
int err;
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1755,7 +1755,7 @@ static int airoha_set_gdm2_loopback(stru
+@@ -1791,7 +1791,7 @@ static int airoha_set_gdm2_loopback(stru
{
struct airoha_eth *eth = port->qdma->eth;
u32 val, pse_port, chan;
- int src_port;
+ int i, src_port;
- /* Forward the traffic to the proper GDM port */
- pse_port = port->id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3
-@@ -1797,6 +1797,9 @@ static int airoha_set_gdm2_loopback(stru
+ airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(AIROHA_GDM2_IDX),
+ FE_PSE_PORT_DROP);
+@@ -1835,6 +1835,9 @@ static int airoha_set_gdm2_loopback(stru
SP_CPORT_MASK(val),
__field_prep(SP_CPORT_MASK(val), FE_PSE_PORT_CDM2));
+ airoha_ppe_set_cpu_port(port, i, AIROHA_GDM2_IDX);
+
if (port->id == AIROHA_GDM4_IDX && airoha_is_7581(eth)) {
- u32 mask = FC_ID_OF_SRC_PORT_MASK(port->nbq);
+ u32 mask = FC_ID_OF_SRC_PORT_MASK(nbq);
-@@ -1835,7 +1838,8 @@ static int airoha_dev_init(struct net_de
+@@ -1873,7 +1876,8 @@ static int airoha_dev_init(struct net_de
}
for (i = 0; i < eth->soc->num_ppe; i++)
}
--- a/drivers/net/ethernet/airoha/airoha_eth.h
+++ b/drivers/net/ethernet/airoha/airoha_eth.h
-@@ -653,7 +653,8 @@ int airoha_get_fe_port(struct airoha_gdm
+@@ -659,7 +659,8 @@ int airoha_get_fe_port(struct airoha_gdm
bool airoha_is_valid_gdm_port(struct airoha_eth *eth,
struct airoha_gdm_port *port);
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1823,7 +1823,7 @@ static int airoha_set_gdm2_loopback(stru
+@@ -1822,7 +1822,7 @@ static int airoha_set_gdm2_loopback(stru
airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, BIT(AIROHA_GDM2_IDX));
airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, BIT(AIROHA_GDM2_IDX));
if (src_port < 0)
return src_port;
-@@ -3199,7 +3199,7 @@ static const char * const en7581_xsi_rst
+@@ -3196,7 +3196,7 @@ static const char * const en7581_xsi_rst
"xfp-mac",
};
{
switch (port->id) {
case AIROHA_GDM3_IDX:
-@@ -3252,7 +3252,7 @@ static const char * const an7583_xsi_rst
+@@ -3249,7 +3249,7 @@ static const char * const an7583_xsi_rst
"xfp-mac",
};
{
switch (port->id) {
case AIROHA_GDM3_IDX:
-@@ -3300,7 +3300,7 @@ static const struct airoha_eth_soc_data
+@@ -3297,7 +3297,7 @@ static const struct airoha_eth_soc_data
.num_xsi_rsts = ARRAY_SIZE(en7581_xsi_rsts_names),
.num_ppe = 2,
.ops = {
.get_vip_port = airoha_en7581_get_vip_port,
},
};
-@@ -3311,7 +3311,7 @@ static const struct airoha_eth_soc_data
+@@ -3308,7 +3308,7 @@ static const struct airoha_eth_soc_data
.num_xsi_rsts = ARRAY_SIZE(an7583_xsi_rsts_names),
.num_ppe = 1,
.ops = {
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -332,7 +332,7 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -334,7 +334,7 @@ static int airoha_ppe_foe_entry_prepare(
info.wcid);
} else {
struct airoha_gdm_port *port = netdev_priv(dev);
if (!airoha_is_valid_gdm_port(eth, port))
return -EINVAL;
-@@ -345,6 +345,14 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -347,6 +347,14 @@ static int airoha_ppe_foe_entry_prepare(
* loopback
*/
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -734,6 +734,14 @@ F: Documentation/devicetree/bindings/phy
+@@ -754,6 +754,14 @@ F: Documentation/devicetree/bindings/phy
F: drivers/phy/phy-airoha-pcie-regs.h
F: drivers/phy/phy-airoha-pcie.c
M: Ray Liu <ray.liu@airoha.com>
--- a/sound/soc/mediatek/Kconfig
+++ b/sound/soc/mediatek/Kconfig
-@@ -3,6 +3,26 @@ config SND_SOC_MEDIATEK
+@@ -5,6 +5,26 @@ config SND_SOC_MEDIATEK
tristate
select REGMAP_MMIO
+
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -751,6 +751,13 @@ S: Maintained
+@@ -771,6 +771,13 @@ S: Maintained
F: Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
F: drivers/spi/spi-airoha-snfi.c
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -7
56,6 +756,7 @@ M: Christian Marangi <ansuelsmth@gmail.c
+@@ -7
76,6 +776,7 @@ M: Christian Marangi <ansuelsmth@gmail.c
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
-@@ -925,6 +925,12 @@ static int mtk_pcie_en7581_power_up(stru
+@@ -969,6 +969,12 @@ static int mtk_pcie_en7581_power_up(stru
size = lower_32_bits(resource_size(entry->res));
regmap_write(pbus_regmap, args[1], GENMASK(31, __fls(size)));
--- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
+++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
@@ -64,8 +64,6 @@ allOf:
- - description: scu base address
- - description: misc scu base address
+ reg:
+ minItems: 2
- '#reset-cells': false
-
- if:
properties:
compatible:
-@@ -89,6 +87,7 @@ examples:
+@@ -85,6 +83,7 @@ examples:
reg = <0x1fa20000 0x400>,
<0x1fb00000 0x1000>;
#clock-cells = <1>;
}
static void airoha_pcs_init_hsgmii(struct airoha_pcs_priv *priv, int index)
-@@ -512,6 +549,13 @@ static int airoha_pcs_config(struct phyl
+@@ -514,6 +551,13 @@ static int airoha_pcs_config(struct phyl
AIROHA_PCS_USXGMII_PCS_AN_CONTROL_7,
AIROHA_PCS_USXGMII_RATE_UPDATE_MODE);
}
}
/* Clear any force bit that my be set by bootloader */
-@@ -1015,10 +1059,14 @@ static int airoha_pcs_usb_alloc_maps(str
+@@ -1017,10 +1061,14 @@ static int airoha_pcs_usb_alloc_maps(str
if (ret)
return ret;
struct airoha_pcs_priv *priv)
{
struct airoha_pcs_maps *maps = priv->maps;
-@@ -1115,6 +1163,60 @@ static struct phylink_pcs *airoha_pcs_ge
+@@ -1117,6 +1165,60 @@ static struct phylink_pcs *airoha_pcs_ge
return &priv->ports[index].pcs;
}
static int airoha_pcs_probe(struct platform_device *pdev)
{
const struct airoha_pcs_match_data *data;
-@@ -1136,14 +1238,19 @@ static int airoha_pcs_probe(struct platf
+@@ -1138,14 +1240,19 @@ static int airoha_pcs_probe(struct platf
priv->dev = dev;
priv->data = data;
}
switch (data->port_type) {
-@@ -1155,7 +1262,10 @@ static int airoha_pcs_probe(struct platf
+@@ -1157,7 +1264,10 @@ static int airoha_pcs_probe(struct platf
break;
case AIROHA_PCS_PCIE:
if (ret)
return ret;
-@@ -1260,6 +1370,8 @@ static void airoha_pcs_remove(struct pla
+@@ -1261,6 +1371,8 @@ static void airoha_pcs_remove(struct pla
static const struct airoha_pcs_match_data an7581_pcs_eth = {
.num_port = 1,
.port_type = AIROHA_PCS_ETH,
.alloc_regmap_fields = an7581_pcs_alloc_regmap_fields,
.bringup = an7581_pcs_bringup,
.link_up = an7581_pcs_phya_link_up,
-@@ -1269,6 +1381,8 @@ static const struct airoha_pcs_match_dat
+@@ -1270,6 +1382,8 @@ static const struct airoha_pcs_match_dat
static const struct airoha_pcs_match_data an7581_pcs_pon = {
.num_port = 1,
.port_type = AIROHA_PCS_PON,
.alloc_regmap_fields = an7581_pcs_alloc_regmap_fields,
.bringup = an7581_pcs_bringup,
.link_up = an7581_pcs_phya_link_up,
-@@ -1277,6 +1391,8 @@ static const struct airoha_pcs_match_dat
+@@ -1278,6 +1392,8 @@ static const struct airoha_pcs_match_dat
static const struct airoha_pcs_match_data an7581_pcs_pcie = {
.num_port = 2,
.port_type = AIROHA_PCS_PCIE,
.alloc_regmap_fields = an7581_pcs_pcie_alloc_regmap_fields,
.bringup = an7581_pcs_bringup,
.link_up = an7581_pcs_phya_link_up,
-@@ -1288,11 +1404,44 @@ static const struct airoha_pcs_match_dat
+@@ -1289,11 +1405,44 @@ static const struct airoha_pcs_match_dat
.bringup = an7581_pcs_usb_bringup,
};
/* TODO better handle reset from MAC */
ret = reset_control_bulk_assert(ARRAY_SIZE(priv->rsts),
priv->rsts);
-@@ -1298,6 +1306,10 @@ static int airoha_pcs_probe(struct platf
+@@ -1300,6 +1308,10 @@ static int airoha_pcs_probe(struct platf
if (ret)
return dev_err_probe(dev, ret, "failed to get bulk reset lines\n");
module_phy_driver(as21xxx_drivers);
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
-@@ -2069,7 +2069,8 @@ void phy_detach(struct phy_device *phyde
- device_release_driver(&phydev->mdio.dev);
+@@ -1882,7 +1882,8 @@ void phy_detach(struct phy_device *phyde
+ }
/* Assert the reset signal */
- phy_device_reset(phydev, 1);
* The phydev might go away on the put_device() below, so avoid
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
-@@ -90,6 +90,7 @@ extern const int phy_10gbit_features_arr
+@@ -64,6 +64,7 @@ extern const int phy_basic_ports_array[3
#define PHY_RST_AFTER_CLK_EN 0x00000002
#define PHY_POLL_CABLE_TEST 0x00000004
#define PHY_ALWAYS_CALL_SUSPEND 0x00000008
+EXPORT_SYMBOL_GPL(en7523_set_uart_baud_rate);
--- a/drivers/tty/serial/8250/8250_of.c
+++ b/drivers/tty/serial/8250/8250_of.c
-@@ -341,6 +341,7 @@ static const struct of_device_id of_plat
+@@ -353,6 +353,7 @@ static const struct of_device_id of_plat
{ .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
{ .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, },
{ .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
MODULE_DEVICE_TABLE(of, of_platform_serial_table);
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
-@@ -319,6 +319,14 @@ static const struct serial8250_config ua
+@@ -311,6 +311,14 @@ static const struct serial8250_config ua
.rxtrig_bytes = {1, 8, 16, 30},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
};
/* Uart divisor latch read */
-@@ -2841,6 +2849,12 @@ serial8250_do_set_termios(struct uart_po
-
- serial8250_set_divisor(port, baud, quot, frac);
+@@ -2766,6 +2774,12 @@ serial8250_do_set_termios(struct uart_po
+ baud = serial8250_get_baud_rate(port, termios, old);
+ quot = serial8250_get_divisor(port, baud, &frac);
+#ifdef CONFIG_SERIAL_8250_AIROHA
+ /* Airoha SoCs have custom registers for baud rate settings */
+#endif
+
/*
- * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
- * is written without DLAB set, this mode will be disabled.
+ * Ok, we're now changing the port state. Do it with interrupts disabled.
+ *
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
-@@ -355,6 +355,16 @@ config SERIAL_8250_ACORN
+@@ -356,6 +356,16 @@ config SERIAL_8250_ACORN
system, say Y to this option. The driver can handle 1, 2, or 3 port
cards. If unsure, say N.
#include <linux/spi/spi-mem.h>
+#include <linux/mtd/mtk_bmt.h>
- static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
+ int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
{
-@@ -1604,6 +1605,7 @@ static int spinand_probe(struct spi_mem
+@@ -1718,6 +1719,7 @@ static int spinand_probe(struct spi_mem
if (ret)
return ret;
ret = mtd_device_register(mtd, NULL, 0);
if (ret)
goto err_spinand_cleanup;
-@@ -1611,6 +1613,7 @@ static int spinand_probe(struct spi_mem
+@@ -1725,6 +1727,7 @@ static int spinand_probe(struct spi_mem
return 0;
err_spinand_cleanup:
spinand_cleanup(spinand);
return ret;
-@@ -1629,6 +1632,7 @@ static int spinand_remove(struct spi_mem
+@@ -1743,6 +1746,7 @@ static int spinand_remove(struct spi_mem
if (ret)
return ret;
Signed-off-by: Ryan Chen <rchen14b@gmail.com>
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
-@@ -61,6 +61,14 @@
+@@ -67,6 +67,14 @@
#define PCIE_LTSSM_STATE(val) ((val & PCIE_LTSSM_STATE_MASK) >> 24)
#define PCIE_LTSSM_STATE_L2_IDLE 0x14
#define PCIE_LINK_STATUS_REG 0x154
#define PCIE_PORT_LINKUP BIT(8)
-@@ -205,6 +213,11 @@ struct mtk_gen3_pcie {
+@@ -221,6 +229,11 @@ struct mtk_gen3_pcie {
DECLARE_BITMAP(msi_irq_in_use, PCIE_MSI_IRQS_NUM);
const struct mtk_gen3_pcie_pdata *soc;
};
/* LTSSM state in PCIE_LTSSM_STATUS_REG bit[28:24] */
-@@ -925,6 +938,28 @@ static int mtk_pcie_en7581_power_up(stru
+@@ -969,6 +982,28 @@ static int mtk_pcie_en7581_power_up(stru
size = lower_32_bits(resource_size(entry->res));
regmap_write(pbus_regmap, args[1], GENMASK(31, __fls(size)));
err = phy_set_mode(pcie->phy, PHY_MODE_PCIE);
if (err) {
dev_err(dev, "failed to set PHY mode\n");
-@@ -962,17 +997,28 @@ static int mtk_pcie_en7581_power_up(stru
+@@ -1007,17 +1042,28 @@ static int mtk_pcie_en7581_power_up(stru
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks);
if (err) {
-@@ -981,12 +1027,121 @@ static int mtk_pcie_en7581_power_up(stru
+@@ -1026,12 +1072,121 @@ static int mtk_pcie_en7581_power_up(stru
}
/*
drivers/pci/controller/pcie-mediatek-gen3.c | 124 ++++++++-------
1 file changed, 86 insertions(+), 38 deletions(-)
-diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c
-index afcd4343293e0f..cf7d5272eadb6e 100644
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -72,8 +72,21 @@
#include "airoha_regs.h"
#include "airoha_eth.h"
-@@ -298,7 +299,7 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -300,7 +301,7 @@ static int airoha_ppe_foe_entry_prepare(
struct airoha_foe_entry *hwe,
struct net_device *dev, int type,
struct airoha_flow_data *data,
{
u32 qdata = FIELD_PREP(AIROHA_FOE_SHAPER_ID, 0x7f), ports_pad, val;
int wlan_etype = -EINVAL, dsa_port = airoha_get_dsa_port(&dev);
-@@ -331,7 +332,7 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -333,7 +334,7 @@ static int airoha_ppe_foe_entry_prepare(
info.wcid);
} else {
struct airoha_gdm_port *port = netdev_priv(dev);
if (!airoha_is_valid_gdm_port(eth, port))
return -EINVAL;
-@@ -350,9 +351,13 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -352,9 +353,13 @@ static int airoha_ppe_foe_entry_prepare(
*/
channel = dsa_port >= 0 ? dsa_port : port->id;
channel = channel % AIROHA_NUM_QOS_CHANNELS;
AIROHA_FOE_IB2_PSE_QOS;
/* For downlink traffic consume SRAM memory for hw
* forwarding descriptors queue.
-@@ -1044,9 +1049,9 @@ static int airoha_ppe_flow_offload_repla
+@@ -1046,9 +1051,9 @@ static int airoha_ppe_flow_offload_repla
struct net_device *odev = NULL;
struct flow_action_entry *act;
struct airoha_foe_entry hwe;
if (rhashtable_lookup(ð->flow_table, &f->cookie,
airoha_flow_table_params))
-@@ -1076,6 +1081,13 @@ static int airoha_ppe_flow_offload_repla
+@@ -1078,6 +1083,13 @@ static int airoha_ppe_flow_offload_repla
return -EOPNOTSUPP;
}
switch (addr_type) {
case 0:
offload_type = PPE_PKT_TYPE_BRIDGE;
-@@ -1141,7 +1153,7 @@ static int airoha_ppe_flow_offload_repla
+@@ -1143,7 +1155,7 @@ static int airoha_ppe_flow_offload_repla
return -EINVAL;
err = airoha_ppe_foe_entry_prepare(eth, &hwe, odev, offload_type,
+ airoha_ppe_set_cpu_port(dev, i, AIROHA_GDM2_IDX);
if (port->id == AIROHA_GDM4_IDX && airoha_is_7581(eth)) {
- u32 mask = FC_ID_OF_SRC_PORT_MASK(port->nbq);
+ u32 mask = FC_ID_OF_SRC_PORT_MASK(nbq);
@@ -2033,9 +2038,9 @@ static int airoha_dev_init(struct net_de
int i;
}
}
}
-@@ -1483,11 +1483,12 @@ void airoha_ppe_check_skb(struct airoha_
+@@ -1485,11 +1485,12 @@ void airoha_ppe_check_skb(struct airoha_
airoha_ppe_foe_insert_entry(ppe, skb, hash, rx_wlan);
}
* phy module.
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -365,7 +365,7 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -367,7 +367,7 @@ static int airoha_ppe_foe_entry_prepare(
/* For downlink traffic consume SRAM memory for hw
* forwarding descriptors queue.
*/
static inline bool airoha_is_7581(struct airoha_eth *eth)
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -354,7 +354,7 @@ static int airoha_ppe_foe_entry_prepare(
+@@ -356,7 +356,7 @@ static int airoha_ppe_foe_entry_prepare(
return -EINVAL;
port = dev->port;
u32 hash);
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -1497,12 +1497,10 @@ void airoha_ppe_check_skb(struct airoha_
+@@ -1499,12 +1499,10 @@ void airoha_ppe_check_skb(struct airoha_
airoha_ppe_foe_insert_entry(ppe, skb, hash, rx_wlan);
}
projects / thirdparty / openwrt.git / commitdiff
