if (enable) {
/* 8051 enable */
- tmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
- rtw_write8(padapter, REG_SYS_FUNC_EN+1, tmp|0x04);
+ tmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, tmp | 0x04);
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp|0x01);
/* Reset 8051(WLMCU) IO wrapper */
/* 0x1c[8] = 0 */
/* Suggested by Isaac@SD1 and Gimmy@SD1, coding by Lucas@20130624 */
- io_rst = rtw_read8(padapter, REG_RSV_CTRL+1);
+ io_rst = rtw_read8(padapter, REG_RSV_CTRL + 1);
io_rst &= ~BIT(0);
- rtw_write8(padapter, REG_RSV_CTRL+1, io_rst);
+ rtw_write8(padapter, REG_RSV_CTRL + 1, io_rst);
- cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+ cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
cpu_rst &= ~BIT(2);
- rtw_write8(padapter, REG_SYS_FUNC_EN+1, cpu_rst);
+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, cpu_rst);
/* Enable 8051 IO wrapper */
/* 0x1c[8] = 1 */
- io_rst = rtw_read8(padapter, REG_RSV_CTRL+1);
+ io_rst = rtw_read8(padapter, REG_RSV_CTRL + 1);
io_rst |= BIT(0);
- rtw_write8(padapter, REG_RSV_CTRL+1, io_rst);
+ rtw_write8(padapter, REG_RSV_CTRL + 1, io_rst);
- cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+ cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
cpu_rst |= BIT(2);
- rtw_write8(padapter, REG_SYS_FUNC_EN+1, cpu_rst);
+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, cpu_rst);
}
u8 g_fwdl_chksum_fail;
/* 0x1cf = 0x20. Inform 8051 to reset. 2009.12.25. tynli_test */
rtw_write8(padapter, REG_HMETFR+3, 0x20);
- val = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+ val = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
while (val & BIT2) {
Delay--;
if (Delay == 0)
break;
udelay(50);
- val = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+ val = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
}
if (Delay == 0) {
/* force firmware reset */
- val = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
- rtw_write8(padapter, REG_SYS_FUNC_EN+1, val&(~BIT2));
+ val = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val & (~BIT2));
}
}
}