arm: Fix MVE load/store with writeback intrinsics [PR124870]

These intrinsics (vldr*_gather_base_wb, vstr*_scatter_base_wb) lacked
modelling of memory accesses corresponding to writeback: in this case,
they both read and write memory.

2024-04-24  Christophe Lyon  <christophe.lyon@arm.com>

	PR target/124870
	gcc/
	* config/arm/arm-mve-builtins-base.cc (vstrq_scatter_base_impl)
	(vldrq_gather_base_impl): Fix call_properties.

	gcc/testsuite/
	* gcc.target/arm/mve/intrinsics/pr124870.c: New test.

diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index b344aca3f55d969b691e5368d651f8a766dbc1bd..eaac4316d6b85aec1a23dea9f755c0c4e97efffd 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -294,9 +294,12 @@ public:
     : m_to_int_mode (to_int_mode)
   {}
 
-  unsigned int call_properties (const function_instance &) const override
+  unsigned int call_properties (const function_instance &fi) const override
   {
-    return CP_WRITE_MEMORY;
+    if (fi.mode_suffix_id == MODE_wb)
+      return CP_WRITE_MEMORY | CP_READ_MEMORY;
+    else
+      return CP_WRITE_MEMORY;
   }
 
   machine_mode memory_vector_mode (const function_instance &fi) const override
@@ -480,6 +483,14 @@ public:
     return type_suffixes[suffix].vector_mode;
   }
 
+  unsigned int call_properties (const function_instance &fi) const override
+  {
+    if (fi.mode_suffix_id == MODE_wb)
+      return CP_WRITE_MEMORY | CP_READ_MEMORY;
+    else
+      return CP_READ_MEMORY;
+  }
+
   rtx expand (function_expander &e) const override
   {
     insn_code icode;

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c
new file mode 100644 (file)
index 0000000..cfb41da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c
@@ -0,0 +1,31 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+
+/* PR target/124870.  */
+
+#include <arm_mve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void fn (int n, uint32_t *strides, float32_t *f)
+{
+    uint32x4_t vecScGathAddr = vld1q_u32(strides);
+    float32x4_t vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+    float32x4_t vecB = vecA;
+    int i;
+    for (i = 0; i < n; ++i)
+    {
+        vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+        vecB = vaddq_f32 (vecB, vecA);
+    }
+    vstrwq_f32 (f, vecB);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-times "vadd.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */