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Merge branch 'pci/controller/cadence-sg2042'
authorBjorn Helgaas <bhelgaas@google.com>
Mon, 13 Apr 2026 17:50:08 +0000 (12:50 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 13 Apr 2026 17:50:08 +0000 (12:50 -0500)
- Add cadence core flags to disable advertising broken ASPM support (Yao
  Zi)

- Disable ASPM L0s and L1 on Sophgo 2042 PCIe Root Ports that advertise
  support for them (Yao Zi)

* pci/controller/cadence-sg2042:
  PCI: sg2042: Avoid L0s and L1 on Sophgo 2042 PCIe Root Ports
  PCI: cadence: Add flags for disabling ASPM capability for broken Root Ports

1  2 
drivers/pci/controller/cadence/pcie-cadence.h patch | diff1 | diff2 | blob | history

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