drm/i915/dsc: Add intel_dsc_get_slice_config()

Add intel_dsc_get_slice_config() and move the logic to select a given
slice configuration to that function from the configuration loop in
intel_dp_dsc_get_slice_count(). The same functionality can be used by
other outputs like DSI as well, done as a follow-up.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-12-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index eff4ea998a9489f6a6285d448a894678e58bf972..1d6009b994977bd36b3f4c33e224cc10c9cbbaff 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1030,28 +1030,20 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
         * TGL+: 2x4 (TODO: Add support for this)
         */
        for (slices_per_pipe = 1; slices_per_pipe <= 4; slices_per_pipe++) {
-               int slices_per_line = slices_per_pipe * num_joined_pipes;
+               struct intel_dsc_slice_config config;
+               int slices_per_line;
 
-               /*
-                * 3 DSC Slices per pipe need 3 DSC engines, which is supported only
-                * with Ultrajoiner only for some platforms.
-                */
-               if (slices_per_pipe == 3 &&
-                   (!HAS_DSC_3ENGINES(display) || num_joined_pipes != 4))
+               if (!intel_dsc_get_slice_config(display,
+                                               num_joined_pipes, slices_per_pipe,
+                                               &config))
                        continue;
 
+               slices_per_line = intel_dsc_line_slice_count(&config);
+
                if (!(drm_dp_dsc_slice_count_to_mask(slices_per_line) &
                      sink_slice_count_mask))
                        continue;
 
-                /*
-                 * Bigjoiner needs small joiner to be enabled.
-                 * So there should be at least 2 dsc slices per pipe,
-                 * whenever bigjoiner is enabled.
-                 */
-               if (num_joined_pipes > 1 && slices_per_pipe < 2)
-                       continue;
-
                if (mode_hdisplay % slices_per_line)
                        continue;
 

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index d213947103b51ee08ced89824daf60a50accef51..642a89270d8ec83521a633b3d6e147299d5c7166 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -40,6 +40,53 @@ int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config)
        return config->pipes_per_line * config->streams_per_pipe * config->slices_per_stream;
 }
 
+bool intel_dsc_get_slice_config(struct intel_display *display,
+                               int pipes_per_line, int slices_per_pipe,
+                               struct intel_dsc_slice_config *config)
+{
+       int streams_per_pipe;
+
+       /* TODO: Add support for 8 slices per pipe on TGL+. */
+       switch (slices_per_pipe) {
+       case 3:
+               /*
+                * 3 DSC Slices per pipe need 3 DSC engines, which is supported only
+                * with Ultrajoiner only for some platforms.
+                */
+               if (!HAS_DSC_3ENGINES(display) || pipes_per_line != 4)
+                       return false;
+
+               streams_per_pipe = 3;
+               break;
+       case 4:
+               /* TODO: Consider using 1 DSC engine stream x 4 slices instead. */
+       case 2:
+               /* TODO: Consider using 1 DSC engine stream x 2 slices instead. */
+               streams_per_pipe = 2;
+               break;
+       case 1:
+                /*
+                 * Bigjoiner needs small joiner to be enabled.
+                 * So there should be at least 2 dsc slices per pipe,
+                 * whenever bigjoiner is enabled.
+                 */
+               if (pipes_per_line > 1)
+                       return false;
+
+               streams_per_pipe = 1;
+               break;
+       default:
+               MISSING_CASE(slices_per_pipe);
+               return false;
+       }
+
+       config->pipes_per_line = pipes_per_line;
+       config->streams_per_pipe = streams_per_pipe;
+       config->slices_per_stream = slices_per_pipe / streams_per_pipe;
+
+       return true;
+}
+
 static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
        struct intel_display *display = to_intel_display(crtc);

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index e61116d5297c89366db3375dff8f3bc9a66af5af..aeb17670307b1b9c64404f8293b3b050c49e25d2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -13,11 +13,15 @@ struct drm_printer;
 enum transcoder;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_display;
 struct intel_dsc_slice_config;
 struct intel_encoder;
 
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
 int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config);
+bool intel_dsc_get_slice_config(struct intel_display *display,
+                               int num_joined_pipes, int slice_per_pipe,
+                               struct intel_dsc_slice_config *config);
 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
 void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);