extern const struct ar8xxx_mib_desc ar8236_mibs[39];
extern const struct switch_attr ar8xxx_sw_attr_vlan[1];
-static u32
-ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
-{
- u32 t;
-
- if (!cfg)
- return 0;
-
- t = 0;
- switch (cfg->mode) {
- case AR8327_PAD_NC:
- break;
-
- case AR8327_PAD_MAC2MAC_MII:
- t = AR8327_PAD_MAC_MII_EN;
- if (cfg->rxclk_sel)
- t |= AR8327_PAD_MAC_MII_RXCLK_SEL;
- if (cfg->txclk_sel)
- t |= AR8327_PAD_MAC_MII_TXCLK_SEL;
- break;
-
- case AR8327_PAD_MAC2MAC_GMII:
- t = AR8327_PAD_MAC_GMII_EN;
- if (cfg->rxclk_sel)
- t |= AR8327_PAD_MAC_GMII_RXCLK_SEL;
- if (cfg->txclk_sel)
- t |= AR8327_PAD_MAC_GMII_TXCLK_SEL;
- break;
-
- case AR8327_PAD_MAC_SGMII:
- t = AR8327_PAD_SGMII_EN;
-
- /*
- * WAR for the QUalcomm Atheros AP136 board.
- * It seems that RGMII TX/RX delay settings needs to be
- * applied for SGMII mode as well, The ethernet is not
- * reliable without this.
- */
- t |= cfg->txclk_delay_sel << AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S;
- t |= cfg->rxclk_delay_sel << AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S;
- if (cfg->rxclk_delay_en)
- t |= AR8327_PAD_RGMII_RXCLK_DELAY_EN;
- if (cfg->txclk_delay_en)
- t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
-
- if (cfg->sgmii_delay_en)
- t |= AR8327_PAD_SGMII_DELAY_EN;
-
- break;
-
- case AR8327_PAD_MAC2PHY_MII:
- t = AR8327_PAD_PHY_MII_EN;
- if (cfg->rxclk_sel)
- t |= AR8327_PAD_PHY_MII_RXCLK_SEL;
- if (cfg->txclk_sel)
- t |= AR8327_PAD_PHY_MII_TXCLK_SEL;
- break;
-
- case AR8327_PAD_MAC2PHY_GMII:
- t = AR8327_PAD_PHY_GMII_EN;
- if (cfg->pipe_rxclk_sel)
- t |= AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL;
- if (cfg->rxclk_sel)
- t |= AR8327_PAD_PHY_GMII_RXCLK_SEL;
- if (cfg->txclk_sel)
- t |= AR8327_PAD_PHY_GMII_TXCLK_SEL;
- break;
-
- case AR8327_PAD_MAC_RGMII:
- t = AR8327_PAD_RGMII_EN;
- t |= cfg->txclk_delay_sel << AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S;
- t |= cfg->rxclk_delay_sel << AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S;
- if (cfg->rxclk_delay_en)
- t |= AR8327_PAD_RGMII_RXCLK_DELAY_EN;
- if (cfg->txclk_delay_en)
- t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
- break;
-
- case AR8327_PAD_PHY_GMII:
- t = AR8327_PAD_PHYX_GMII_EN;
- break;
-
- case AR8327_PAD_PHY_RGMII:
- t = AR8327_PAD_PHYX_RGMII_EN;
- break;
-
- case AR8327_PAD_PHY_MII:
- t = AR8327_PAD_PHYX_MII_EN;
- break;
- }
-
- return t;
-}
-
static void
ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev)
{
}
}
-static u32
-ar8327_get_port_init_status(struct ar8327_port_cfg *cfg)
-{
- u32 t;
-
- if (!cfg->force_link)
- return AR8216_PORT_STATUS_LINK_AUTO;
-
- t = AR8216_PORT_STATUS_TXMAC | AR8216_PORT_STATUS_RXMAC;
- t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
- t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
- t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
-
- switch (cfg->speed) {
- case AR8327_PORT_SPEED_10:
- t |= AR8216_PORT_SPEED_10M;
- break;
- case AR8327_PORT_SPEED_100:
- t |= AR8216_PORT_SPEED_100M;
- break;
- case AR8327_PORT_SPEED_1000:
- t |= AR8216_PORT_SPEED_1000M;
- break;
- }
-
- return t;
-}
-
#define AR8327_LED_ENTRY(_num, _reg, _shift) \
[_num] = { .reg = (_reg), .shift = (_shift) }
unsigned shift;
};
-enum ar8327_pad_mode {
- AR8327_PAD_NC = 0,
- AR8327_PAD_MAC2MAC_MII,
- AR8327_PAD_MAC2MAC_GMII,
- AR8327_PAD_MAC_SGMII,
- AR8327_PAD_MAC2PHY_MII,
- AR8327_PAD_MAC2PHY_GMII,
- AR8327_PAD_MAC_RGMII,
- AR8327_PAD_PHY_GMII,
- AR8327_PAD_PHY_RGMII,
- AR8327_PAD_PHY_MII,
-};
-
-enum ar8327_clk_delay_sel {
- AR8327_CLK_DELAY_SEL0 = 0,
- AR8327_CLK_DELAY_SEL1,
- AR8327_CLK_DELAY_SEL2,
- AR8327_CLK_DELAY_SEL3,
-};
-
-struct ar8327_pad_cfg {
- enum ar8327_pad_mode mode;
- bool rxclk_sel;
- bool txclk_sel;
- bool pipe_rxclk_sel;
- bool txclk_delay_en;
- bool rxclk_delay_en;
- bool sgmii_delay_en;
- enum ar8327_clk_delay_sel txclk_delay_sel;
- enum ar8327_clk_delay_sel rxclk_delay_sel;
- bool mac06_exchange_dis;
-};
-
-enum ar8327_port_speed {
- AR8327_PORT_SPEED_10 = 0,
- AR8327_PORT_SPEED_100,
- AR8327_PORT_SPEED_1000,
-};
-
-struct ar8327_port_cfg {
- int force_link:1;
- enum ar8327_port_speed speed;
- int txpause:1;
- int rxpause:1;
- int duplex:1;
-};
-
-struct ar8327_sgmii_cfg {
- u32 sgmii_ctrl;
- bool serdes_aen;
-};
-
enum ar8327_led_num {
AR8327_LED_PHY0_0 = 0,
AR8327_LED_PHY0_1,