clk: qcom: nord: negcc: add support for the USB2 PHY reset

Expose the USB2 PHY reset in order to enable adding the USB nodes in DTS
for Nord.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260518-nord-clk-usb2-phy-v2-2-17a86cb307c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/negcc-nord.c b/drivers/clk/qcom/negcc-nord.c
index 2cb66b0691a65f21e67a4f2d001fe468befacff9..2e653ef0fe0e304f09ed354d5578fdbed9151d20 100644 (file)
--- a/drivers/clk/qcom/negcc-nord.c
+++ b/drivers/clk/qcom/negcc-nord.c
@@ -1918,6 +1918,7 @@ static const struct qcom_reset_map ne_gcc_nord_resets[] = {
        [NE_GCC_USB3_PHY_SEC_BCR] = { 0x2d000 },
        [NE_GCC_USB3PHY_PHY_PRIM_BCR] = { 0x2b004 },
        [NE_GCC_USB3PHY_PHY_SEC_BCR] = { 0x2d004 },
+       [NE_GCC_QUSB2PHY_PRIM_BCR] = { 0x2e000 },
 };
 
 static const struct clk_rcg_dfs_data ne_gcc_nord_dfs_clocks[] = {