pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615

PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not
support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
pin to support non-ibi wakeup. Update the wakeirq map to reflect same.

Fixes: b698f36a9d40 ("pinctrl: qcom: add the tlmm driver for QCS615 platform")
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Navya Malempati <navya.malempati@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>

diff --git a/drivers/pinctrl/qcom/pinctrl-qcs615.c b/drivers/pinctrl/qcom/pinctrl-qcs615.c
index 0ed4332d989eb58a02a0697e4c29a58ff6f5090c..f066b3a576f7a40eab45cdc5641670d92ccaf5a5 100644 (file)
--- a/drivers/pinctrl/qcom/pinctrl-qcs615.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs615.c
@@ -1040,11 +1040,11 @@ static const struct msm_pingroup qcs615_groups[] = {
 static const struct msm_gpio_wakeirq_map qcs615_pdc_map[] = {
        { 1, 45 },    { 3, 31 },    { 7, 55 },    { 9, 110 },   { 11, 34 },
        { 13, 33 },   { 14, 35 },   { 17, 46 },   { 19, 48 },   { 21, 83 },
-       { 22, 36 },   { 26, 38 },   { 35, 37 },   { 39, 125 },  { 41, 47 },
-       { 47, 49 },   { 48, 51 },   { 50, 52 },   { 51, 123 },  { 55, 56 },
+       { 22, 36 },   { 26, 38 },   { 35, 37 },   { 39, 118 },  { 41, 47 },
+       { 47, 49 },   { 48, 51 },   { 50, 52 },   { 51, 116 },  { 55, 56 },
        { 56, 57 },   { 57, 58 },   { 60, 60 },   { 71, 54 },   { 80, 73 },
        { 81, 64 },   { 82, 50 },   { 83, 65 },   { 84, 92 },   { 85, 99 },
-       { 86, 67 },   { 87, 84 },   { 88, 124 },  { 89, 122 },  { 90, 69 },
+       { 86, 67 },   { 87, 84 },   { 88, 117 },  { 89, 115 },  { 90, 69 },
        { 92, 88 },   { 93, 75 },   { 94, 91 },   { 95, 72 },   { 96, 82 },
        { 97, 74 },   { 98, 95 },   { 99, 94 },   { 100, 100 }, { 101, 40 },
        { 102, 93 },  { 103, 77 },  { 104, 78 },  { 105, 96 },  { 107, 97 },