]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
rs6000: Add -mcpu=future support and built-in gating infrastructure
authorKishan Parmar <kishan@linux.ibm.com>
Mon, 4 May 2026 09:03:07 +0000 (14:33 +0530)
committerKishan Parmar <kishan@linux.ibm.com>
Mon, 4 May 2026 09:03:07 +0000 (14:33 +0530)
This patch introduces support for the -mcpu=future option, intended to
enable experimental processor features that may or may not be included
in future Power processors. The option serves as a placeholder for
development and evaluation purposes, and may be renamed if a
corresponding processor is defined.

In addition, this change adds support for gating rs6000 built-ins using
a new target predicate "future", corresponding to -mcpu=future. This
extends rs6000-gen-builtins.cc and rs6000-builtin.cc to recognize
[future] as a valid predicate, allowing new built-ins defined in .bif
files to be conditionally enabled.

Bootstrapped and Regtested on Power10 little-endian system, using the
--with-cpu=future configuration option.

2026-05-04  Kishan Parmar  <kishan@linux.ibm.com>

gcc/
* config.gcc (powerpc*-*-*): Add support for supporting
--with-cpu=future.
* config/rs6000/aix71.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
if the user used the -mcpu=future option.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
ENB_FUTURE and issue diagnostic requiring -mcpu=future.
(rs6000_builtin_is_supported): Return TARGET_FUTURE for
ENB_FUTURE built-ins.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
_ARCH_FUTURE if -mcpu=future.
* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
(rs6000_cpu_opt_value): New entry for 'future' via the RS6000_CPU macro.
* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
BSTZ_FUTURE for future.
(write_decls): Add ENB_FUTURE in bif_enable enum of generated header
file.
* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (rs6000_machine_from_flags) If -mcpu=future,
set the .machine directive to "future".
(rs6000_opt_masks): Add entry for -mfuture.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
if the user used the -mcpu=future option.
* config/rs6000/rs6000.opt (-mfuture): New option.
* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document
-mcpu=future.

gcc/testsuite/
* gcc.target/powerpc/future-1.c: New test.
* gcc.target/powerpc/future-2.c: Likewise.

16 files changed:
gcc/config.gcc
gcc/config/rs6000/aix71.h
gcc/config/rs6000/aix72.h
gcc/config/rs6000/aix73.h
gcc/config/rs6000/rs6000-builtin.cc
gcc/config/rs6000/rs6000-c.cc
gcc/config/rs6000/rs6000-cpus.def
gcc/config/rs6000/rs6000-gen-builtins.cc
gcc/config/rs6000/rs6000-opts.h
gcc/config/rs6000/rs6000-tables.opt
gcc/config/rs6000/rs6000.cc
gcc/config/rs6000/rs6000.h
gcc/config/rs6000/rs6000.opt
gcc/doc/invoke.texi
gcc/testsuite/gcc.target/powerpc/future-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/future-2.c [new file with mode: 0644]

index 0d4b7897c21d3ec9ed3d059a477050d0669dff60..562780ea61575159e10bdc0ab440c83d104e3374 100644 (file)
@@ -555,7 +555,7 @@ powerpc*-*-*)
        extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
        extra_headers="${extra_headers} amo.h"
        case x$with_cpu in
-           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xfuture|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
                cpu_is_64bit=yes
                ;;
        esac
@@ -5870,7 +5870,7 @@ case "${target}" in
                                eval "with_$which=405"
                                ;;
                        "" | common | native \
-                       | power[3456789] | power1[01] | power5+ | power6x \
+                       | power[3456789] | power1[01] | future | power5+ | power6x \
                        | powerpc | powerpc64 | powerpc64le \
                        | rs64 \
                        | 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
index 3093de62088d7fddd9c04046057980933420a174..2331004344f9733a61629b91a700dcf5b7891ce5 100644 (file)
@@ -79,6 +79,7 @@ do {                                                                  \
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
index 515eeebe5aaae5c9c51faa86517a1c664c3ad4ea..9105f4254d0eb33851634a8d8ef4178b24cbe260 100644 (file)
@@ -79,6 +79,7 @@ do {                                                                  \
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
index d89a4a197b376a944d7b5f27325de5d3aa70c458..8316decceae577038b9a4d717332d19a1dbf908e 100644 (file)
@@ -79,6 +79,7 @@ do {                                                                  \
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
index 45c88fe063b14384f73c4ce46d13545220759577..4d0e541351f2ad8d42b52c2bc5137ebd6b330326 100644 (file)
@@ -139,6 +139,9 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
     case ENB_MMA:
       error ("%qs requires the %qs option", name, "-mmma");
       break;
+    case ENB_FUTURE:
+      error ("%qs requires the %qs option", name, "-mcpu=future");
+      break;
     default:
     case ENB_ALWAYS:
       gcc_unreachable ();
@@ -194,6 +197,8 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
       return TARGET_HTM;
     case ENB_MMA:
       return TARGET_MMA;
+    case ENB_FUTURE:
+      return TARGET_FUTURE;
     default:
       gcc_unreachable ();
     }
index f6cc8923775824b0010b00f777026b03c8ee5d01..3fa7c04a7ce269a8304211a68cbab40d84a76621 100644 (file)
@@ -437,6 +437,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
   if ((flags & OPTION_MASK_POWER11) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+  if ((flags & OPTION_MASK_FUTURE) != 0)
+    rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
     rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
index 36be338493eb6fc2cab2af967e9b2a012410a9b9..a110860acce6ef432cce658ad9d994331d261972 100644 (file)
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER                     \
                              | OPTION_MASK_POWER11)
 
+/* -mcpu=future flags.  */
+#define FUTURE_MASKS_SERVER    (POWER11_MASKS_SERVER                   \
+                                | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX    \
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
                                 | OPTION_MASK_FPRND                    \
                                 | OPTION_MASK_POWER10                  \
                                 | OPTION_MASK_POWER11                  \
+                                | OPTION_MASK_FUTURE                   \
                                 | OPTION_MASK_P10_FUSION               \
                                 | OPTION_MASK_HTM                      \
                                 | OPTION_MASK_ISEL                     \
@@ -249,6 +254,7 @@ RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER
            | OPTION_MASK_HTM)
 RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)
 RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER)
 RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
            | MASK_POWERPC64)
index c7ae5899c5cd41025f8054b879c91fd8181a6751..7436404cff582a581940fa14d717cbcd2f1df8b2 100644 (file)
@@ -232,6 +232,7 @@ enum bif_stanza
  BSTZ_P10,
  BSTZ_P10_64,
  BSTZ_MMA,
+ BSTZ_FUTURE,
  NUMBIFSTANZAS
 };
 
@@ -265,7 +266,8 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] =
     { "htm",           BSTZ_HTM        },
     { "power10",       BSTZ_P10        },
     { "power10-64",    BSTZ_P10_64     },
-    { "mma",           BSTZ_MMA        }
+    { "mma",           BSTZ_MMA        },
+    { "future",        BSTZ_FUTURE     }
   };
 
 static const char *enable_string[NUMBIFSTANZAS] =
@@ -290,7 +292,8 @@ static const char *enable_string[NUMBIFSTANZAS] =
     "ENB_HTM",
     "ENB_P10",
     "ENB_P10_64",
-    "ENB_MMA"
+    "ENB_MMA",
+    "ENB_FUTURE"
   };
 
 /* Function modifiers provide special handling for const, pure, and fpmath
@@ -2249,7 +2252,8 @@ write_decls (void)
   fprintf (header_file, "  ENB_HTM,\n");
   fprintf (header_file, "  ENB_P10,\n");
   fprintf (header_file, "  ENB_P10_64,\n");
-  fprintf (header_file, "  ENB_MMA\n");
+  fprintf (header_file, "  ENB_MMA,\n");
+  fprintf (header_file, "  ENB_FUTURE\n");
   fprintf (header_file, "};\n\n");
 
   fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
index db308065a435006d3c7af7909e980b695269244b..c98cdc7d5c8ccdbb30139c9d7a4f5f30dd8bc0bb 100644 (file)
@@ -71,6 +71,8 @@ enum processor_type
    PROCESSOR_TITAN
 };
 
+/* Make -mtune=future use the same tuning decisions as -mtune=power11.  */
+#define PROCESSOR_FUTURE       PROCESSOR_POWER11
 
 /* Types of costly dependences.  */
 enum rs6000_dependence_cost
index 040c246c2f66d73efac1bbddc2857d4c734014ce..efc55260b2ae526f3b4b1d6cc93d3a6e2d476cf3 100644 (file)
@@ -189,14 +189,17 @@ EnumValue
 Enum(rs6000_cpu_opt_value) String(power11) Value(53)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)
+Enum(rs6000_cpu_opt_value) String(future) Value(54)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(55)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(58)
 
index 3838059a7e25e278fca3a5e5e7e462d422ec77c4..7d61001cb3497d0278bed0e5b71bdb3f6dcd6789 100644 (file)
@@ -5913,6 +5913,8 @@ rs6000_machine_from_flags (void)
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
             | OPTION_MASK_ALTIVEC);
 
+  if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)
+    return "future";
   if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
     return "power11";
   if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
@@ -24465,6 +24467,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "fprnd",                   OPTION_MASK_FPRND,              false, true  },
   { "power10",                 OPTION_MASK_POWER10,            false, true  },
   { "power11",                 OPTION_MASK_POWER11,            false, false },
+  { "future",                  OPTION_MASK_FUTURE,             false, false },
   { "hard-dfp",                        OPTION_MASK_DFP,                false, true  },
   { "htm",                     OPTION_MASK_HTM,                false, true  },
   { "isel",                    OPTION_MASK_ISEL,               false, true  },
index 2b90694cef16401abb4f45ef79dc3dfd7492363d..2d3016db513521208a0c728faf712adb4bb87d5f 100644 (file)
    you make changes here, make them also there.  */
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpower11; \
   mcpu=power10: -mpower10; \
   mcpu=power9: -mpower9; \
index 2eeb45a4b71e9bfe69583d78fd87abdf4e0230a5..2b6ec5222fc191cb7f071e0ae0552abd2b1c976e 100644 (file)
@@ -595,6 +595,10 @@ Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 mpower11
 Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
 
+;; Potential future machine
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>)
+
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)
 Generate (do not generate) prefixed memory instructions.
index fb69dc5fb8058a6f3f3c842bfd009772ac6eddfa..16dc2179073376f76201405132e5d4c7723c710e 100644 (file)
@@ -31647,8 +31647,8 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
-@samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{power9}, @samp{power10}, @samp{power11}, @samp{future}, @samp{powerpc},
+@samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c
new file mode 100644 (file)
index 0000000..7bd8e5d
--- /dev/null
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Basic check to see if the compiler supports -mcpu=future and if it defines
+   _ARCH_FUTURE.  */
+
+#ifndef _ARCH_FUTURE
+#error "-mcpu=future is not supported"
+#endif
+
+void foo (void)
+{
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c
new file mode 100644 (file)
index 0000000..5552cef
--- /dev/null
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* Check if we can set the future target via a target attribute.  */
+
+__attribute__((__target__("cpu=power9")))
+void foo_p9 (void)
+{
+}
+
+__attribute__((__target__("cpu=power10")))
+void foo_p10 (void)
+{
+}
+
+__attribute__((__target__("cpu=power11")))
+void foo_p11 (void)
+{
+}
+
+__attribute__((__target__("cpu=future")))
+void foo_future (void)
+{
+}