if (!priv)
return -ENOMEM;
- priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
+ priv->r = device_get_match_data(&pdev->dev);
+ priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
if (!priv->ds)
return -ENOMEM;
+
priv->ds->dev = dev;
priv->ds->priv = priv;
- priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->needs_standalone_vlan_filtering = true;
+ priv->ds->ops = priv->r->switch_ops;
+ priv->ds->phylink_mac_ops = priv->r->phylink_mac_ops;
+
priv->dev = dev;
dev_set_drvdata(dev, priv);
if (err)
return err;
- priv->r = device_get_match_data(&pdev->dev);
priv->family_id = soc_info.family;
priv->id = soc_info.id;
switch (soc_info.family) {
case RTL8380_FAMILY_ID:
- priv->ds->ops = &rtldsa_83xx_switch_ops;
- priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
priv->ds->num_lag_ids = 8;
priv->l2_bucket_size = 4;
priv->n_mst = 64;
break;
case RTL8390_FAMILY_ID:
- priv->ds->ops = &rtldsa_83xx_switch_ops;
- priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
priv->ds->num_lag_ids = 16;
priv->l2_bucket_size = 4;
priv->n_mst = 256;
break;
case RTL9300_FAMILY_ID:
- priv->ds->ops = &rtldsa_93xx_switch_ops;
- priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
priv->ds->num_lag_ids = 16;
sw_w32(0, RTL930X_ST_CTRL);
priv->l2_bucket_size = 8;
priv->n_mst = 64;
break;
case RTL9310_FAMILY_ID:
- priv->ds->ops = &rtldsa_93xx_switch_ops;
- priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
priv->ds->num_lag_ids = 16;
sw_w32(0, RTL931x_ST_CTRL);
priv->l2_bucket_size = 8;
struct netdev_lag_upper_info *info);
const struct rtldsa_config rtldsa_838x_cfg = {
+ .switch_ops = &rtldsa_83xx_switch_ops,
+ .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops,
.cpu_port = RTL838X_CPU_PORT,
.fib_entries = 8192,
.mask_port_reg_be = rtl838x_mask_port_reg,
struct netdev_lag_upper_info *info);
const struct rtldsa_config rtldsa_839x_cfg = {
+ .switch_ops = &rtldsa_83xx_switch_ops,
+ .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops,
.cpu_port = RTL839X_CPU_PORT,
.fib_entries = 16384,
.mask_port_reg_be = rtl839x_mask_port_reg_be,
}
const struct rtldsa_config rtldsa_931x_cfg = {
+ .switch_ops = &rtldsa_93xx_switch_ops,
+ .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops,
.cpu_port = RTL931X_CPU_PORT,
.fib_entries = 16384, /* TODO: has 32K but code cannot handle that */
.mask_port_reg_be = rtl839x_mask_port_reg_be,