drm/i915/lt_phy: Drop LT PHY crtc_state for port calculation

Drop crtc_state from intel_lt_phy_calc_port_clock() function call
and replace it with pll state instead. Follow-up changes will
call these functions without a crtc_state available.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260119093757.2850233-5-mika.kahola@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index cb91d07cdaa60a3013a8fbd044da5a99d7bd5bdf..d8739e2bb0048d2be019366ecc605121b79aa3d8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4247,13 +4247,15 @@ void intel_ddi_get_clock(struct intel_encoder *encoder,
 static void xe3plpd_ddi_get_config(struct intel_encoder *encoder,
                                   struct intel_crtc_state *crtc_state)
 {
+       struct intel_display *display = to_intel_display(encoder);
+
        intel_lt_phy_pll_readout_hw_state(encoder, crtc_state, &crtc_state->dpll_hw_state.ltpll);
 
        if (crtc_state->dpll_hw_state.ltpll.tbt_mode)
                crtc_state->port_clock = intel_mtl_tbt_calc_port_clock(encoder);
        else
                crtc_state->port_clock =
-                       intel_lt_phy_calc_port_clock(encoder, crtc_state);
+                       intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll);
        intel_ddi_get_config(encoder, crtc_state);
 }
 

diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index a4f372c9e6fca7f686547d1b36fdeadd589ccde0..1b5b18fa0a36bc8b39beee8de043d6dad3397ea2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1219,6 +1219,7 @@ static int xe3plpd_crtc_compute_clock(struct intel_atomic_state *state,
                intel_atomic_get_new_crtc_state(state, crtc);
        struct intel_encoder *encoder =
                intel_get_crtc_new_encoder(state, crtc_state);
+       struct intel_display *display = to_intel_display(encoder);
        int ret;
 
        ret = intel_lt_phy_pll_calc_state(crtc_state, encoder);
@@ -1227,7 +1228,7 @@ static int xe3plpd_crtc_compute_clock(struct intel_atomic_state *state,
 
        /* TODO: Do the readback via intel_compute_shared_dplls() */
        crtc_state->port_clock =
-                       intel_lt_phy_calc_port_clock(encoder, crtc_state);
+                       intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll);
 
        crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state);
 

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 6cdae03ee172c0516e690d49e98bd4ca3d937621..48f644f417d2a6106db01638969485c5dfa35534 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -1680,7 +1680,8 @@ intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state,
 }
 
 static int
-intel_lt_phy_calc_hdmi_port_clock(const struct intel_crtc_state *crtc_state)
+intel_lt_phy_calc_hdmi_port_clock(struct intel_display *display,
+                                 const struct intel_lt_phy_pll_state *lt_state)
 {
 #define REGVAL(i) (                            \
        (lt_state->data[i][3])          |       \
@@ -1689,9 +1690,6 @@ intel_lt_phy_calc_hdmi_port_clock(const struct intel_crtc_state *crtc_state)
        (lt_state->data[i][0] << 24)            \
 )
 
-       struct intel_display *display = to_intel_display(crtc_state);
-       const struct intel_lt_phy_pll_state *lt_state =
-               &crtc_state->dpll_hw_state.ltpll;
        int clk = 0;
        u32 d8, pll_reg_5, pll_reg_3, pll_reg_57, m2div_frac, m2div_int;
        u64 temp0, temp1;
@@ -1749,13 +1747,10 @@ intel_lt_phy_calc_hdmi_port_clock(const struct intel_crtc_state *crtc_state)
 }
 
 int
-intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
-                            const struct intel_crtc_state *crtc_state)
+intel_lt_phy_calc_port_clock(struct intel_display *display,
+                            const struct intel_lt_phy_pll_state *lt_state)
 {
-       struct intel_display *display = to_intel_display(encoder);
        int clk;
-       const struct intel_lt_phy_pll_state *lt_state =
-               &crtc_state->dpll_hw_state.ltpll;
        u8 mode, rate;
 
        mode = REG_FIELD_GET8(LT_PHY_VDR_MODE_ENCODING_MASK,
@@ -1771,7 +1766,7 @@ intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
                                      lt_state->config[0]);
                clk = intel_lt_phy_get_dp_clock(rate);
        } else if (mode == MODE_HDMI_20) {
-               clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state);
+               clk = intel_lt_phy_calc_hdmi_port_clock(display, lt_state);
        } else {
                drm_WARN_ON(display->drm, "Unsupported LT PHY Mode!\n");
                clk = xe3plpd_lt_hdmi_252.clock;
@@ -2230,6 +2225,7 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
                                       const struct intel_crtc_state *crtc_state,
                                       struct intel_lt_phy_pll_state *pll_state)
 {
+       struct intel_display *display = to_intel_display(encoder);
        u8 owned_lane_mask;
        u8 lane;
        struct ref_tracker *wakeref;
@@ -2255,7 +2251,7 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
        }
 
        pll_state->clock =
-               intel_lt_phy_calc_port_clock(encoder, crtc_state);
+               intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll);
        intel_lt_phy_transaction_end(encoder, wakeref);
 }
 

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h b/drivers/gpu/drm/i915/display/intel_lt_phy.h
index bf41858f1bc370d89132668edf01b19dde0fae3d..22b12d2d5bb16055b4fa5b393ea75dc7887fa20a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h
@@ -21,8 +21,8 @@ void intel_lt_phy_pll_disable(struct intel_encoder *encoder);
 int
 intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state,
                            struct intel_encoder *encoder);
-int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
-                                const struct intel_crtc_state *crtc_state);
+int intel_lt_phy_calc_port_clock(struct intel_display *display,
+                                const struct intel_lt_phy_pll_state *lt_state);
 void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
                                    const struct intel_crtc_state *crtc_state);
 void intel_lt_phy_dump_hw_state(struct intel_display *display,