(match_operand:SVE_FULL_I 3 "aarch64_simd_reg_or_zero")]
UNSPEC_SEL))]
"TARGET_SVE && <elem_bits> >= <min_elem_bits>"
- {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ]
- [ w , Upl , w , 0 ; * ] <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
- [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ]
+ [ w , Upl , w , 0 ; * , * ] <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_int_op>\t%0.<Vetype>, %1/z, %2.<Vetype>
+ [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
+ [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype>
}
[(set_attr "sve_type" "sve_int_general")]
)
UNSPEC_REVD_ONLY)]
UNSPEC_PRED_X))]
"TARGET_SVE2p1_OR_SME"
- {@ [ cons: =0 , 1 , 2 ]
- [ w , Upl , 0 ] revd\t%0.q, %1/m, %2.q
+ {@ [ cons: =0 , 1 , 2 ; attrs: arch ]
+ [ w , Upl , 0 ; * ] revd\t%0.q, %1/m, %2.q
+ [ w , Upl , w ; sve2p2_or_sme2p2 ] revd\t%0.q, %1/z, %2.q
}
[(set_attr "sve_type" "sve_int_general")]
)
(unspec:SVE_FULL
[(match_operand:SVE_FULL 2 "register_operand")]
UNSPEC_REVD_ONLY)
- (match_operand:SVE_FULL 3 "register_operand")]
+ (match_operand:SVE_FULL 3 "aarch64_simd_reg_or_direct_zero")]
UNSPEC_SEL))]
"TARGET_SVE2p1_OR_SME"
- {@ [ cons: =0 , 1 , 2 , 3 ]
- [ w , Upl , w , 0 ] revd\t%0.q, %1/m, %2.q
+ {@ [ cons: =0 , 1 , 2 , 3 ; attrs: arch ]
+ [ w , Upl , w , 0 ; * ] revd\t%0.q, %1/m, %2.q
+ [ w , Upl , w , Dz ; sve2p2_or_sme2p2 ] revd\t%0.q, %1/z, %2.q
}
[(set_attr "sve_type" "sve_int_general")]
)
(match_test "op == const0_rtx")
(match_operand 0 "aarch64_simd_or_scalar_imm_zero"))))
+;; Same as above, but a zero const_vector is only allowed when a
+;; corresponding single-insn (i.e. not involving MOVPRFX) alternative is
+;; enabled. Used for zeroing predication forms of some SVE2.2
+;; instructions.
+(define_predicate "aarch64_simd_reg_or_direct_zero"
+ (ior (and (match_test "TARGET_SVE2p2_OR_SME2p2")
+ (match_operand 0 "aarch64_simd_reg_or_zero"))
+ (match_operand 0 "register_operand")))
+
(define_predicate "aarch64_simd_reg_or_minus_one"
(ior (match_operand 0 "register_operand")
(match_operand 0 "aarch64_simd_imm_minus_one")))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revb_s16_z_tied1:
+** revb z0\.h, p0/z, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (revb_s16_z_tied1, svint16_t,
+ z0 = svrevb_s16_z (p0, z0),
+ z0 = svrevb_z (p0, z0))
+
+/*
+** revb_s16_z_untied:
+** revb z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (revb_s16_z_untied, svint16_t,
+ z0 = svrevb_s16_z (p0, z1),
+ z0 = svrevb_z (p0, z1))
+
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revb_s32_z_tied1:
+** revb z0\.s, p0/z, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (revb_s32_z_tied1, svint32_t,
+ z0 = svrevb_s32_z (p0, z0),
+ z0 = svrevb_z (p0, z0))
+
+/*
+** revb_s32_z_untied:
+** revb z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (revb_s32_z_untied, svint32_t,
+ z0 = svrevb_s32_z (p0, z1),
+ z0 = svrevb_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revb_s64_z_tied1:
+** revb z0\.d, p0/z, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (revb_s64_z_tied1, svint64_t,
+ z0 = svrevb_s64_z (p0, z0),
+ z0 = svrevb_z (p0, z0))
+
+/*
+** revb_s64_z_untied:
+** revb z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (revb_s64_z_untied, svint64_t,
+ z0 = svrevb_s64_z (p0, z1),
+ z0 = svrevb_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revb_u16_z_tied1:
+** revb z0\.h, p0/z, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (revb_u16_z_tied1, svuint16_t,
+ z0 = svrevb_u16_z (p0, z0),
+ z0 = svrevb_z (p0, z0))
+
+/*
+** revb_u16_z_untied:
+** revb z0\.h, p0/z, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (revb_u16_z_untied, svuint16_t,
+ z0 = svrevb_u16_z (p0, z1),
+ z0 = svrevb_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revb_u32_z_tied1:
+** revb z0\.s, p0/z, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (revb_u32_z_tied1, svuint32_t,
+ z0 = svrevb_u32_z (p0, z0),
+ z0 = svrevb_z (p0, z0))
+
+/*
+** revb_u32_z_untied:
+** revb z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (revb_u32_z_untied, svuint32_t,
+ z0 = svrevb_u32_z (p0, z1),
+ z0 = svrevb_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revb_u64_z_tied1:
+** revb z0\.d, p0/z, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (revb_u64_z_tied1, svuint64_t,
+ z0 = svrevb_u64_z (p0, z0),
+ z0 = svrevb_z (p0, z0))
+
+/*
+** revb_u64_z_untied:
+** revb z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (revb_u64_z_untied, svuint64_t,
+ z0 = svrevb_u64_z (p0, z1),
+ z0 = svrevb_z (p0, z1))
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_bf16_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_bf16_z_tied1, svbfloat16_t,
+ z0 = svrevd_bf16_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_bf16_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_bf16_z_untied, svbfloat16_t,
+ z0 = svrevd_bf16_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_f16_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_f16_z_tied1, svfloat16_t,
+ z0 = svrevd_f16_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_f16_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_f16_z_untied, svfloat16_t,
+ z0 = svrevd_f16_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_f32_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_f32_z_tied1, svfloat32_t,
+ z0 = svrevd_f32_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_f32_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_f32_z_untied, svfloat32_t,
+ z0 = svrevd_f32_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_f64_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_f64_z_tied1, svfloat64_t,
+ z0 = svrevd_f64_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_f64_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_f64_z_untied, svfloat64_t,
+ z0 = svrevd_f64_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_s16_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s16_z_tied1, svint16_t,
+ z0 = svrevd_s16_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_s16_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s16_z_untied, svint16_t,
+ z0 = svrevd_s16_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_s32_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s32_z_tied1, svint32_t,
+ z0 = svrevd_s32_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_s32_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s32_z_untied, svint32_t,
+ z0 = svrevd_s32_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_s64_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s64_z_tied1, svint64_t,
+ z0 = svrevd_s64_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_s64_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s64_z_untied, svint64_t,
+ z0 = svrevd_s64_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_s8_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s8_z_tied1, svint8_t,
+ z0 = svrevd_s8_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_s8_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_s8_z_untied, svint8_t,
+ z0 = svrevd_s8_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_u16_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u16_z_tied1, svuint16_t,
+ z0 = svrevd_u16_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_u16_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u16_z_untied, svuint16_t,
+ z0 = svrevd_u16_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_u32_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u32_z_tied1, svuint32_t,
+ z0 = svrevd_u32_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_u32_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u32_z_untied, svuint32_t,
+ z0 = svrevd_u32_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_u64_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u64_z_tied1, svuint64_t,
+ z0 = svrevd_u64_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_u64_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u64_z_untied, svuint64_t,
+ z0 = svrevd_u64_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revd_u8_z_tied1:
+** revd z0\.q, p0/z, z0\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u8_z_tied1, svuint8_t,
+ z0 = svrevd_u8_z (p0, z0),
+ z0 = svrevd_z (p0, z0))
+
+/*
+** revd_u8_z_untied:
+** revd z0\.q, p0/z, z1\.q
+** ret
+*/
+TEST_UNIFORM_Z (revd_u8_z_untied, svuint8_t,
+ z0 = svrevd_u8_z (p0, z1),
+ z0 = svrevd_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revh_s32_z_tied1:
+** revh z0\.s, p0/z, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (revh_s32_z_tied1, svint32_t,
+ z0 = svrevh_s32_z (p0, z0),
+ z0 = svrevh_z (p0, z0))
+
+/*
+** revh_s32_z_untied:
+** revh z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (revh_s32_z_untied, svint32_t,
+ z0 = svrevh_s32_z (p0, z1),
+ z0 = svrevh_z (p0, z1))
+
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revh_s64_z_tied1:
+** revh z0\.d, p0/z, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (revh_s64_z_tied1, svint64_t,
+ z0 = svrevh_s64_z (p0, z0),
+ z0 = svrevh_z (p0, z0))
+
+/*
+** revh_s64_z_untied:
+** revh z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (revh_s64_z_untied, svint64_t,
+ z0 = svrevh_s64_z (p0, z1),
+ z0 = svrevh_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revh_u32_z_tied1:
+** revh z0\.s, p0/z, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (revh_u32_z_tied1, svuint32_t,
+ z0 = svrevh_u32_z (p0, z0),
+ z0 = svrevh_z (p0, z0))
+
+/*
+** revh_u32_z_untied:
+** revh z0\.s, p0/z, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (revh_u32_z_untied, svuint32_t,
+ z0 = svrevh_u32_z (p0, z1),
+ z0 = svrevh_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revh_u64_z_tied1:
+** revh z0\.d, p0/z, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (revh_u64_z_tied1, svuint64_t,
+ z0 = svrevh_u64_z (p0, z0),
+ z0 = svrevh_z (p0, z0))
+
+/*
+** revh_u64_z_untied:
+** revh z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (revh_u64_z_untied, svuint64_t,
+ z0 = svrevh_u64_z (p0, z1),
+ z0 = svrevh_z (p0, z1))
+
+
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revw_s64_z_tied1:
+** revw z0\.d, p0/z, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (revw_s64_z_tied1, svint64_t,
+ z0 = svrevw_s64_z (p0, z0),
+ z0 = svrevw_z (p0, z0))
+
+/*
+** revw_s64_z_untied:
+** revw z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (revw_s64_z_untied, svint64_t,
+ z0 = svrevw_s64_z (p0, z1),
+ z0 = svrevw_z (p0, z1))
--- /dev/null
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** revw_u64_z_tied1:
+** revw z0\.d, p0/z, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (revw_u64_z_tied1, svuint64_t,
+ z0 = svrevw_u64_z (p0, z0),
+ z0 = svrevw_z (p0, z0))
+
+/*
+** revw_u64_z_untied:
+** revw z0\.d, p0/z, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (revw_u64_z_untied, svuint64_t,
+ z0 = svrevw_u64_z (p0, z1),
+ z0 = svrevw_z (p0, z1))
+
projects / thirdparty / gcc.git / commitdiff
