riscv: Fix SSP assembly with xtheadmemidx [PR 125320]

The m constraint accepts memory operands suitable for memory load/store
instructions in extensions, not only the ld/sd instructions.  So we
cannot always use ld/sd in the SSP instruction sequences.

Call riscv_output_move() for the correct assembly template instead.

	PR target/125320

gcc/

	* config/riscv/riscv.md (stack_protect_test_<mode>): Call
	riscv_output_move() instead of hard coding <load>.
	(stack_protect_set_<mode>): Call riscv_output_move() instead of
	hard coding <load> and <store>.

gcc/testsuite/

	* gcc.target/riscv/pr125320.c: New test.

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4a5d90e0f6aa7feff7cf1eaf5ba5b3baa4eb45d6..8615a2ebad44421ee722e7573e8f5c7aea314410 100644 (file)
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -4526,7 +4526,16 @@
         UNSPEC_SSP_SET))
    (set (match_scratch:GPR 2 "=&r") (const_int 0))]
   ""
-  "<load>\t%2, %1\;<store>\t%2, %0\;li\t%2, 0"
+  {
+    rtx moves[][2] = {
+      {operands[2], operands[1]},
+      {operands[0], operands[2]},
+    };
+    for (rtx *op: moves)
+      output_asm_insn (riscv_output_move (op[0], op[1]), op);
+
+    return "li\t%2, 0";
+  }
   [(set_attr "type" "multi")
    (set_attr "length" "12")])
 
@@ -4566,7 +4575,16 @@
         UNSPEC_SSP_TEST))
    (clobber (match_scratch:GPR 3 "=&r"))]
   ""
-  "<load>\t%3, %1\;<load>\t%0, %2\;xor\t%0, %3, %0\;li\t%3, 0"
+  {
+    rtx moves[][2] = {
+      {operands[3], operands[1]},
+      {operands[0], operands[2]},
+    };
+    for (rtx *op: moves)
+      output_asm_insn (riscv_output_move (op[0], op[1]), op);
+
+    return "xor\t%0, %3, %0\;li\t%3, 0";
+  }
   [(set_attr "type" "multi")
    (set_attr "length" "12")])
 

diff --git a/gcc/testsuite/gcc.target/riscv/pr125320.c b/gcc/testsuite/gcc.target/riscv/pr125320.c
new file mode 100644 (file)
index 0000000..2bc33ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr125320.c
@@ -0,0 +1,10 @@
+/* { dg-do assemble } */
+/* { dg-options "-O2 -mabi=lp64d -march=rv64gc_xtheadmemidx -fstack-protector-strong" } */
+
+void __gen_tempname (char *, int, int, int);
+void
+tempnam ()
+{
+  char buf[4096];
+  __gen_tempname (buf, 0, 0, 2);
+}