arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes

[ Upstream commit a3f34651de4287138c0da19ba321ad72622b4af3 ]

The HW user manual for the Renesas RZ/V2H(P) SoC (a.k.a r9a09g057)
states that only WDT1 is supposed to be accessed by the CA55 cores.
WDT0 is supposed to be used by the CM33 core, WDT2 is supposed
to be used by the CR8 core 0, and WDT3 is supposed to be used
by the CR8 core 1.

Remove wdt{0,2,3} from the SoC specific device tree to make it
compliant with the specification from the HW manual.

This change is harmless as there are currently no users of the
wdt{0,2,3} device tree nodes, only the wdt1 node is actually used.

Fixes: 095105496e7d ("arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260203124247.7320-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 4676ee7561395f8a39ce33fefed0b12be84571da..5c7b9e296f439f717a377da718f916811dd45249 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -201,16 +201,6 @@
                        status = "disabled";
                };
 
-               wdt0: watchdog@11c00400 {
-                       compatible = "renesas,r9a09g057-wdt";
-                       reg = <0 0x11c00400 0 0x400>;
-                       clocks = <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>;
-                       clock-names = "pclk", "oscclk";
-                       resets = <&cpg 0x75>;
-                       power-domains = <&cpg>;
-                       status = "disabled";
-               };
-
                wdt1: watchdog@14400000 {
                        compatible = "renesas,r9a09g057-wdt";
                        reg = <0 0x14400000 0 0x400>;
@@ -221,26 +211,6 @@
                        status = "disabled";
                };
 
-               wdt2: watchdog@13000000 {
-                       compatible = "renesas,r9a09g057-wdt";
-                       reg = <0 0x13000000 0 0x400>;
-                       clocks = <&cpg CPG_MOD 0x4f>, <&cpg CPG_MOD 0x50>;
-                       clock-names = "pclk", "oscclk";
-                       resets = <&cpg 0x77>;
-                       power-domains = <&cpg>;
-                       status = "disabled";
-               };
-
-               wdt3: watchdog@13000400 {
-                       compatible = "renesas,r9a09g057-wdt";
-                       reg = <0 0x13000400 0 0x400>;
-                       clocks = <&cpg CPG_MOD 0x51>, <&cpg CPG_MOD 0x52>;
-                       clock-names = "pclk", "oscclk";
-                       resets = <&cpg 0x78>;
-                       power-domains = <&cpg>;
-                       status = "disabled";
-               };
-
                rtc: rtc@11c00800 {
                        compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
                        reg = <0 0x11c00800 0 0x400>;