skx_set_decode() currently handles both address decoding and Retry
Read error Log (RRL) reporting, coupling two independent functions
in a single API. This complicates setup/teardown and forces callers
to update unrelated state.
Introduce skx_set_show_rrl() and keep skx_set_decode() focused on
decode setup, allowing decode and RRL handling to be managed
independently.
Also rename the callback type and variable to skx_show_rrl_f and
show_rrl for clearer RRL terminology and consistency.
No functional changes intended.
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Link: https://patch.msgid.link/20260521073112.3881223-3-qiuxu.zhuo@intel.com
skx_setup_debug("i10nm_test");
if (retry_rd_err_log && res_cfg->reg_rrl_ddr) {
- skx_set_decode(i10nm_mc_decode, show_retry_rd_err_log);
+ skx_set_show_rrl(show_retry_rd_err_log);
if (retry_rd_err_log == 2)
enable_retry_rd_err_log(true);
- } else {
- skx_set_decode(i10nm_mc_decode, NULL);
}
+ skx_set_decode(i10nm_mc_decode);
+
i10nm_printk(KERN_INFO, "%s\n", I10NM_REVISION);
return 0;
{
edac_dbg(2, "\n");
+ skx_set_decode(NULL);
+
if (retry_rd_err_log && res_cfg->reg_rrl_ddr) {
- skx_set_decode(NULL, NULL);
if (retry_rd_err_log == 2)
enable_retry_rd_err_log(false);
+ skx_set_show_rrl(NULL);
}
skx_teardown_debug();
}
}
- skx_set_decode(skx_decode, skx_show_retry_rd_err_log);
+ skx_set_show_rrl(skx_show_retry_rd_err_log);
if (nvdimm_count && skx_adxl_get() != -ENODEV) {
- skx_set_decode(NULL, skx_show_retry_rd_err_log);
+ skx_set_decode(NULL);
} else {
if (nvdimm_count)
skx_printk(KERN_NOTICE, "Only decoding DDR4 address!\n");
- skx_set_decode(skx_decode, skx_show_retry_rd_err_log);
+ skx_set_decode(skx_decode);
}
/* Ensure that the OPSTATE is set correctly for POLL or NMI */
static char skx_msg[MSG_SIZE];
static skx_decode_f driver_decode;
-static skx_show_retry_log_f skx_show_retry_rd_err_log;
+static skx_show_rrl_f show_rrl;
static u64 skx_tolm, skx_tohm;
static LIST_HEAD(dev_edac_list);
static bool skx_mem_cfg_2lm;
}
EXPORT_SYMBOL_GPL(skx_set_res_cfg);
-void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log)
+void skx_set_decode(skx_decode_f decode)
{
driver_decode = decode;
- skx_show_retry_rd_err_log = show_retry_log;
}
EXPORT_SYMBOL_GPL(skx_set_decode);
+void skx_set_show_rrl(skx_show_rrl_f rrl)
+{
+ show_rrl = rrl;
+}
+EXPORT_SYMBOL_GPL(skx_set_show_rrl);
+
static int skx_get_pkg_id(struct skx_dev *d, u8 *id)
{
int node;
res->row, res->column, res->bank_address, res->bank_group);
}
- if (skx_show_retry_rd_err_log)
- skx_show_retry_rd_err_log(res, skx_msg + len, MSG_SIZE - len, scrub_err);
+ if (show_rrl)
+ show_rrl(res, skx_msg + len, MSG_SIZE - len, scrub_err);
edac_dbg(0, "%s\n", skx_msg);
typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci,
struct res_config *cfg);
typedef bool (*skx_decode_f)(struct decoded_addr *res);
-typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len, bool scrub_err);
+typedef void (*skx_show_rrl_f)(struct decoded_addr *res, char *msg, int len, bool scrub_err);
u64 skx_readx(void __iomem *addr, u8 width);
u64 skx_read_imc_reg(struct skx_imc *imc, int chan, u32 offset, u8 width);
void skx_write_imc_reg(struct skx_imc *imc, int chan, u32 offset, u8 width, u64 val);
int skx_adxl_get(void);
void skx_adxl_put(void);
-void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log);
+void skx_set_decode(skx_decode_f decode);
+void skx_set_show_rrl(skx_show_rrl_f rrl);
void skx_set_mem_cfg(bool mem_cfg_2lm);
void skx_set_res_cfg(struct res_config *cfg);
void skx_init_mc_mapping(struct skx_dev *d);