realtek: add support for Zyxel XMG1915-10EP

Specifications
==============

- SoC: RTL9302C
- Flash: 32 MiB SPI NOR flash
- RAM: 256 MiB
- Ethernet: 8x 10/100/1000/2500 Mbps (RTL8224)
- PoE: 802.3 af/at/bt on 8x RJ45 ports
    - 60W per port, 130W total budget
- SFP: 2x SFP+ cages
- UART: 1x 4 pins serial header, 115200 bauds, 8n1, 3.3v logic levels,
        pinout: unused (top), TX, RX, GND (bottom)
- Buttons: 1x "Restore" button, 1x "LED mode" button

MAC address
===========

Single MAC address derived from board partition with vendor-specific
format. MAC address is 70:49:a2:xx:xx:xx and applied to all switch
ports.

PoE
===

PoE is supported by realtek-poe package. To make it work, additional
options in the realtek-poe configuration file /etc/config/poe must be
set:

    config globals
            option force_baudrate '115200'
	    option force_dialect 'realtek'

Disclaimer
==========

Flashing OpenWrt will overwrite BootExtension + ZyNOS. BootExtension
functionality is not available anymore then. The U-boot/Bootbase still
has some limited functionality which can be used in emergency cases.

Installation
============

Simple web upgrade:

1. Take the OpenWrt factory.bin image generated by the build.

2. In the ZyNOS web UI, login and go to Maintenance -> Firmware Upgrade.

3. Under "Boot Image", make sure the Config Boot Image is set to 1. In
   other words, make sure the switch booted from firmware image 1 or it
   will do so on next reboot.
   This is crucial, otherwise OpenWrt cannot boot.

4. Below, select and upload the factory.bin image. After clicking
   upgrade, the image will be flashed.

5. After flashing has finished, reboot the switch. It will now boot into
   OpenWrt.

U-Boot
======

This device ships with U-boot masked as Bootbase. After the device is
powered, a DRAM test is performed. Spamming $ during that test will drop
you into a shell after test finished. You'll have a limited command set
at first.

Unlocking the shell with [1] or [2] will give you a normal U-boot
command set. From here, you can perform initramfs boot or recovery.

Initramfs boot:
> loady 0x82000000 + go 0x82000000

Recovery:
> upgradeY image2 0x82000000 115200

Return to stock firmware
========================

1. Download the firmware for the switch from Zyxel website.

2. Unzip the download, there should be a .bin file with a alphanumeric
   name.

3. Upload this file to running OpenWrt.

4. Run (use -F since the image doesn't have image metadata):

   > sysupgrade -F <stock-firmware>.bin

5. Wait for the sysupgrade to succeed and the switch reboot. At the next
   boot, ZyNOS should come up again.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/realtek/base-files/lib/upgrade/platform.sh b/target/linux/realtek/base-files/lib/upgrade/platform.sh
index 27bc0ba8dcdfc7beee589762a5089de0c8e48fd8..cddf5315b75c46bd5b6347d74ff4f3007ce4de57 100644 (file)
--- a/target/linux/realtek/base-files/lib/upgrade/platform.sh
+++ b/target/linux/realtek/base-files/lib/upgrade/platform.sh
@@ -45,6 +45,7 @@ platform_do_upgrade() {
                nand_do_upgrade "$1"
                ;;
        zyxel,xmg1915-10e|\
+       zyxel,xmg1915-10ep|\
        zyxel,xs1930-10|\
        zyxel,xs1930-12f|\
        zyxel,xs1930-12hp)

diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xmg1915-10ep.dts b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915-10ep.dts
new file mode 100644 (file)
index 0000000..6f1aac9
--- /dev/null
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915-10ep.dts
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/dts-v1/;
+
+#include "rtl9302_zyxel_xmg1915.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+       compatible = "zyxel,xmg1915-10ep", "realtek,rtl9302c-soc";
+       model = "Zyxel XMG1915-10EP Switch";
+
+       keys {
+               compatible = "gpio-keys";
+
+               led-mode {
+                       label = "led-mode";
+                       gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+               };
+       };
+};
+
+&uart1 {
+       status = "okay";
+};

diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi
index ac25269f79684305c68f24545f16d2acbf249bc0..4083fd4f7b37c15380c4441a9915adbcd8ce169c 100644 (file)
--- a/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi
@@ -183,6 +183,15 @@
        };
 };
 
+/*
+ * GPIO 2 is the global reset shared by all PHYs across all MDIO busses.
+ * It is intentionally not declared as reset-gpios on any bus: the MDIO
+ * driver / phylink only support a reset GPIO per bus, not on the parent
+ * controller. Attaching it to a single bus would still reset the PHYs
+ * on the other busses as a side effect, leaving their software state
+ * out of sync with the hardware and likely breaking them.
+ */
+
 &mdio_bus0 {
        /* External RTL8224 PHY */
        phy0: ethernet-phy@0 {

diff --git a/target/linux/realtek/image/rtl930x.mk b/target/linux/realtek/image/rtl930x.mk
index 388c698cd1090cc5f5876e6e8ae3fa3c77c4f813..0cb43b08d53e8a742aa3fc4eb68dcb9a3045a2d9 100644 (file)
--- a/target/linux/realtek/image/rtl930x.mk
+++ b/target/linux/realtek/image/rtl930x.mk
@@ -239,3 +239,10 @@ define Device/zyxel_xmg1915-10e
   $(Device/zyxel_xmg1915)
 endef
 TARGET_DEVICES += zyxel_xmg1915-10e
+
+define Device/zyxel_xmg1915-10ep
+  DEVICE_MODEL := XMG1915-10EP
+  $(Device/zyxel_xmg1915)
+  DEVICE_PACKAGES := realtek-poe
+endef
+TARGET_DEVICES += zyxel_xmg1915-10ep