/*********************************************************
- * Copyright (c) 2003-2024 Broadcom. All rights reserved.
+ * Copyright (c) 2003-2025 Broadcom. All Rights Reserved.
* The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or modify it
#include "vm_basic_types.h"
#if defined VM_X86_64
-#include "vm_basic_asm_x86_common.h"
-#include "vm_basic_asm_x86_64.h"
+ #include "vm_basic_asm_x86_common.h"
+ #include "vm_basic_asm_x86_64.h"
#elif defined VM_X86_32
-#include "vm_basic_asm_x86_common.h"
-#include "vm_basic_asm_x86.h"
+ #include "vm_basic_asm_x86_common.h"
+ #include "vm_basic_asm_x86.h"
#elif defined VM_ARM_32
-#include "vm_basic_asm_arm32.h"
-#define MUL64_NO_ASM 1
-#include "mul64.h"
+ #include "vm_basic_asm_arm32.h"
+ #define MUL64_NO_ASM 1
+ #include "mul64.h"
#elif defined VM_ARM_64
-#include "vm_basic_asm_arm64.h"
-#ifdef VMKERNEL
-#include "vmk_arm_mode.h"
-#endif
+ #include "vm_basic_asm_arm64.h"
+
+ #ifdef VMKERNEL
+ #include "vmk_arm_mode.h"
+ #endif
#else
-#define MUL64_NO_ASM 1
-#include "mul64.h"
+ #define MUL64_NO_ASM 1
+ #include "mul64.h"
#endif
#if defined _M_ARM64EC || defined _M_ARM64
Bswap32(uint32 v) // IN
{
#if defined(__GNUC__) && defined(VM_X86_ANY)
- /* Checked against the Intel manual and GCC. --hpreg */
+ /* Checked against the Intel manual and GCC. */
__asm__(
"bswap %0"
: "=r" (v)
/*
- * Checked against the Intel manual and GCC --hpreg
+ * Checked against the Intel manual and GCC.
*
* volatile because the tsc always changes without the compiler knowing it.
*/
static inline uint64
RDTSC(void)
-#ifdef __GNUC__
{
-#ifdef VM_X86_64
- uint64 tscLow;
- uint64 tscHigh;
-
- __asm__ __volatile__(
- "rdtsc"
- : "=a" (tscLow), "=d" (tscHigh)
- );
-
- return tscHigh << 32 | tscLow;
-#elif defined(VM_X86_32)
- uint64 tim;
-
- __asm__ __volatile__(
- "rdtsc"
- : "=A" (tim)
- );
-
- return tim;
-#elif defined(VM_ARM_64)
+#if defined VM_ARM_64
/*
* Keep this implementation in sync with:
* bora/vmkernel/hardware/arm64/tscsync_arch.h::TSCSyncRDTSC()
* bora/lib/vprobe/arm64/vp_emit_tc.c::VpEmit_BuiltinRDTSCWork()
* bora/modules/vmkernel/tests/core/xmapTest/xmapTest_arm64.c::XMapTest_SetupLoopCode()
*/
-#ifdef VMKERNEL
- return MRSx(VMK_CNT_CT_EL);
-#else
- return MRS(CNTVCT_EL0);
-#endif
-#else
- /*
- * For platform without cheap timer, just return 0.
- */
- return 0;
-#endif
-}
-#elif defined(_MSC_VER)
-#ifdef VM_X86_ANY
-{
- return __rdtsc();
-}
-#else
-{
- /*
- * We need to do more investigation here to find
- * a Microsoft equivalent of that code.
- */
- NOT_IMPLEMENTED();
- return 0;
-}
-#endif /* VM_X86_ANY */
+ #ifdef VMKERNEL
+ return MRSx(VMK_CNT_CT_EL);
+ #else
+ return MRS(CNTVCT_EL0);
+ #endif
+#elif defined __GNUC__
+ #ifdef VM_X86_64
+ uint64 tscLow;
+ uint64 tscHigh;
+
+ __asm__ __volatile__(
+ "rdtsc"
+ : "=a" (tscLow), "=d" (tscHigh)
+ );
+
+ return tscHigh << 32 | tscLow;
+ #elif defined VM_X86_32
+ uint64 tim;
+
+ __asm__ __volatile__(
+ "rdtsc"
+ : "=A" (tim)
+ );
+
+ return tim;
+ #else
+ /*
+ * For platform without cheap timer, just return 0.
+ */
+ return 0;
+ #endif
+#elif defined _MSC_VER
+ #ifdef VM_X86_ANY
+ return __rdtsc();
+ #else
+ /*
+ * Do investigation to find an appropriate equivalent. (Possibly
+ * QueryPerformanceCounter might be good enough.)
+ */
+ NOT_IMPLEMENTED();
+ return 0;
+ #endif /* VM_X86_ANY */
#else /* __GNUC__ */
-#error No compiler defined for RDTSC
+ #error No compiler defined for RDTSC
#endif /* __GNUC__ */
+}
/*
#endif
#endif // _VM_BASIC_ASM_H_
-
#include "vmk_arm_nvsim.h"
#endif
+#if defined _MSC_VER
+#include <arm64intr.h> // For Microsoft's ARM64_SYSREG().
+
+typedef enum {
+#define _SYSREG(name, op0, op1, crn, crm, op2) \
+ MSC_SYSREG_##name = ARM64_SYSREG(op0, op1, crn, crm, op2),
+#include "arm64/sysreg_table.h"
+#undef _SYSREG
+} MscSysReg;
+#endif // _MSC_VER
+
#if defined __cplusplus
extern "C" {
#endif
retAddr = (uint64)GetReturnAddress(); \
} while (0)
+#endif // ifdef __GNUC__
+
/*
*----------------------------------------------------------------------
*----------------------------------------------------------------------
*/
-#if (defined VMKERNEL || defined VMKBOOT) && defined VMK_ARM_NVSIM
+#if defined _MSC_VER
+#define MRS(name) _ReadStatusReg(MSC_SYSREG_##name)
+#elif defined __GNUC__ && (defined VMKERNEL || defined VMKBOOT) && defined VMK_ARM_NVSIM
#define MRS(name) ({ \
uint64 val; \
if (CONC(VMK_ARM_NVSIM_, name) == 0) { \
} \
val; \
})
-#else
+#elif defined __GNUC__
#define MRS(name) ({ \
uint64 val; \
asm volatile ("mrs %0, " XSTR(name) : "=r" (val) :: "memory"); \
*----------------------------------------------------------------------
*/
-#if (defined VMKERNEL || defined VMKBOOT) && defined VMK_ARM_NVSIM
+#if defined _MSC_VER
+#define MSR(name, val) _WriteStatusReg(MSC_SYSREG_##name, val)
+#elif defined __GNUC__ && (defined VMKERNEL || defined VMKBOOT) && defined VMK_ARM_NVSIM
#define MSR(name, val) do { \
if (CONC(VMK_ARM_NVSIM_, name) == 0) { \
asm volatile ("msr " XSTR(name) ", %0" :: "r" (val) : "memory"); \
"msr " XSTR(name) ", %0" :: "r" (val) : "memory"); \
} \
} while (0)
-#else
+#elif defined __GNUC__
#define MSR(name, val) \
asm volatile ("msr " XSTR(name) ", %0" :: "r" (val) : "memory")
#endif
+#if defined __GNUC__
#define MSR_IMMED(name, val) \
asm volatile ("msr " XSTR(name) ", %0" :: "i" (val) : "memory")
-
-#endif // ifdef __GNUC__
+#endif
/*