arm64: dts: qcom: sdm630: add SPI7 interface

Add spi7 interface to SDM630 device tree.

Signed-off-by: Gianluca Boiano <morf3089@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260120193634.1089688-1-morf3089@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index f4b8e8f468f2479d1c353315a146e29d28a85019..1e424a9503c7d0e9b9e16ea62f364a631bdaefbb 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1013,6 +1013,20 @@
                                        drive-strength = <2>;
                                };
                        };
+
+                       spi7_default: spi7-default-state {
+                               pins = "gpio24", "gpio25", "gpio26", "gpio27";
+                               function = "blsp_spi7";
+                               drive-strength = <6>;
+                               bias-disable;
+                       };
+
+                       spi7_sleep: spi7-sleep-state {
+                               pins = "gpio24", "gpio25", "gpio26", "gpio27";
+                               function = "blsp_spi7";
+                               drive-strength = <6>;
+                               bias-disable;
+                       };
                };
 
                remoteproc_mss: remoteproc@4080000 {
@@ -1950,6 +1964,26 @@
                        status = "disabled";
                };
 
+               blsp_spi7: spi@c1b7000 {
+                       compatible = "qcom,spi-qup-v2.2.1";
+                       reg = <0x0c1b7000 0x600>;
+                       interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+
+                       clocks = <&gcc GCC_BLSP2_QUP3_SPI_APPS_CLK>,
+                                <&gcc GCC_BLSP2_AHB_CLK>;
+                       clock-names = "core", "iface";
+
+                       dmas = <&blsp2_dma 8>, <&blsp2_dma 9>;
+                       dma-names = "tx", "rx";
+
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&spi7_default>;
+                       pinctrl-1 = <&spi7_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                blsp_i2c8: i2c@c1b8000 {
                        compatible = "qcom,i2c-qup-v2.2.1";
                        reg = <0x0c1b8000 0x600>;