Revert "rs6000: Fix infinite loop building ghostscript and icu [PR93658]"

This reverts commit 53efbfe030a5fda41e5e7856d76ea827dd09f49c.
See PR93974.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cbbf34a9fce146b5342bb6430eea419569835bc5..8d76d07c7f8e4d3d3a2a00d9a89fcc4399b68977 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -93,15 +93,6 @@
        * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
        non-zero address even if weak and not yet defined.
 
-2020-02-23  Peter Bergner  <bergner@linux.ibm.com>
-
-       Backport from master
-       2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
-
-       PR target/93658
-       * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
-       vector modes.
-
 2020-02-23  Peter Bergner  <bergner@linux.ibm.com>
 
        Backport from master

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index c622d8e808f7ed92d1f2276646766958def67930..cfd07bc261be3550a0fec1c132462c1c0e296216 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -9951,7 +9951,7 @@ rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict)
   bool quad_offset_p = mode_supports_vsx_dform_quad (mode);
 
   /* If this is an unaligned stvx/ldvx type address, discard the outer AND.  */
-  if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)
+  if (VECTOR_MEM_ALTIVEC_P (mode)
       && GET_CODE (x) == AND
       && GET_CODE (XEXP (x, 1)) == CONST_INT
       && INTVAL (XEXP (x, 1)) == -16)

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 07b8be32e952a0952b090aaf727e9784f739fc17..591076f1cb76032e0a605fa3497efa6295ed7b10 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -69,15 +69,6 @@
        PR middle-end/90313
        * g++.dg/torture/pr90313.cc: New test.
 
-2020-02-23  Peter Bergner  <bergner@linux.ibm.com>
-
-       Backport from master
-       2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
-
-       PR target/93658
-       * gcc.target/powerpc/pr93658.c: New test.
-       * gcc.target/powerpc/vsx-vector-6-le.c: Update fragile insn count.
-
 2020-02-20  H.J. Lu  <hongjiu.lu@intel.com>
 
        Backport from master

diff --git a/gcc/testsuite/gcc.target/powerpc/pr93658.c b/gcc/testsuite/gcc.target/powerpc/pr93658.c
deleted file mode 100644 (file)
index 0170d34..0000000
--- a/gcc/testsuite/gcc.target/powerpc/pr93658.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O3 -fstack-protector-strong -mcpu=power8" } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-
-/* PR93658: Failure compiling this test is an infinite loop in LRA's
-   process_address(), so set a short timeout limit.  */
-/* { dg-timeout 5 } */
-
-void bar();
-char b;
-void
-foo (void)
-{
-  char a;
-  int d = b;
-  char *e = &a;
-  while (d)
-    *e++ = --d;
-  bar ();
-}

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
index dc6ccb77d1feac14efbcd3249f307223bdb2ce06..fe7eeb12ff96ecabd1abbbe906c436400a2667b2 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
@@ -14,7 +14,7 @@
    their usage counts being stable.  Therefore, we just ensure at least one
    xxlor instruction was generated.  */
 /* { dg-final { scan-assembler "xxlor" } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 } } */
 /* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
 /* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */
 /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */