]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Fri, 29 May 2026 00:16:40 +0000 (00:16 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Fri, 29 May 2026 00:16:40 +0000 (00:16 +0000)
gcc/ChangeLog
gcc/DATESTAMP
gcc/ada/ChangeLog
gcc/cobol/ChangeLog
gcc/cp/ChangeLog
gcc/fortran/ChangeLog
gcc/testsuite/ChangeLog
libcody/ChangeLog
libgcc/config/avr/libf7/ChangeLog
libgfortran/ChangeLog
libstdc++-v3/ChangeLog

index 0998dec6fb4e273f4b564fc881fd5d6cbee63616..dd5339a114db62d79e8790a56bff0b77acfb4f40 100644 (file)
@@ -1,3 +1,346 @@
+2026-05-28  Roger Sayle  <roger@nextmovesoftware.com>
+
+       * tree-ssa-loop-im.cc (ref_always_accessed_p): Rename to...
+       (ref_always_stored_p): New function specialized to determine if
+       REF is a store that is always executed in LOOP.
+       (execute_sm): Use ref_always_stored_p instead of
+       ref_always_accessed_p.
+       (class ref_always_accessed): Rename to..
+       (class ref_always_stored): Remove (always true) stored_p field.
+       (ref_always_stored::operator ()): Always check for a store.
+       Move hash table lookup, get_lim_data, after store test.
+       (can_sm_ref_p): Use ref_always_stored_p insead of
+       ref_always_accessed_p.
+
+2026-05-28  Roger Sayle  <roger@nextmovesoftware.com>
+
+       * config/i386/i386-features.cc (compute_convert_gain): Tweak
+       the cost of a 128-bit rotation to be 4 (or 5) instructions.
+
+2026-05-28  Roger Sayle  <roger@nextmovesoftware.com>
+           Hongtao Liu  <hongtao.liu@intel.com>
+
+       * config/i386/i386-features.cc (scalar_chain::add_insn): Don't
+       call analyze_register_chain if the USE is a SUBREG.
+       (scalar_chain::convert_op): Call gen_lowpart to convert
+       scalar (TImode) SUBREGs to vector (V1TImode) SUBREGs.
+       (convertible_comparison_p): We can now handle all general_operands
+       of *cmp<dwi>_doubleword.
+       (timode_remove_non_convertible_regs): We only need to check TImode
+       uses that aren't TImode SUBREGs of registers in other modes.
+
+2026-05-28  Roger Sayle  <roger@nextmovesoftware.com>
+           Hongtao Liu  <hongtao.liu@intel.com>
+           Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (inv_insn): New define_code_attr.
+       * config/i386/sse.md (<plusminus><mode>3): Accept a CONST_VECTOR
+       as the second operand.  If the second operand is CONST1_RTX,
+       canonicalize to use CONSTM1_RTX instead.
+       (*add<mode>3_one): New define_insn_and_split to convert padd +1
+       to psub -1.
+       (*sub<mode>3_one): Likewise, a new define_insn_and_split to
+       convert psub +1 to padd -1.
+
+2026-05-28  Jin Ma  <jinma@linux.alibaba.com>
+
+       * config/riscv/riscv.cc (riscv_regno_to_class): Use the minimal
+       class containing each FP hard register: FP_REGS for f0-f7 and
+       f16-f31, RVC_FP_REGS for f8-f15.
+       (riscv_secondary_memory_needed): Use reg_class_subset_p to
+       detect FP classes.
+
+2026-05-28  Zhongyao Chen  <chen.zhongyao@zte.com.cn>
+
+       * config/riscv/riscv-vector-costs.cc (get_lmul_cost_scaling):
+       Enable scaling for all vector modes (VLA and VLS).
+
+2026-05-28  Georg-Johann Lay  <avr@gjlay.de>
+
+       * config/avr/avr.opt.urls (-masm-len-notes, -Wasm-len-notes): Add.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * config/aarch64/aarch64-sve.md
+       (*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>):
+       New pattern.
+       * config/aarch64/iterators.md (VCONSV): New mode attribute.
+       (vconsv): Likewise.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * config/aarch64/aarch64-simd.md (*aarch64_combine_internal<mode>):
+       New insn pattern.
+       (*aarch64_combine_internal_be<mode>): Likewise.
+       (*aarch64_combinez<mode>): Likewise.
+       (*aarch64_combinez_be<mode>): Likewise.
+       (@aarch64_vec_concat<mode>): Support smaller vector and scalar modes.
+       * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback):
+       Handle the case of two scalar elements.
+       * config/aarch64/iterators.md (SSUB64): New mode iterator.
+       (VSSUB64): Likewise.
+       (VSSUB32_I) : Likewise.
+       (VSSUB64_F): Likewise.
+       (VS32_I_SUB64_F): Likewise.
+       (single_wx): Define attribute for sub-64-bit vector and scalar modes.
+       (bitsize): Likewise.
+       (VDBL): Likewise.
+       (single_dwx): New mode attribute.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * config/aarch64/aarch64-simd.md (*aarch64_simd_dup_subvector<vconq><mode>):
+       New insn pattern.
+       (*aarch64_simd_dup_subvector<vcond><mode>): Likewise.
+       (@aarch64_simd_vec_set<mode>): Likewise.
+       (vec_set<mode>): Handle 16- and 32-bit vector modes in the expander.
+       * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Add
+       logic to initialize vector from starting subsequence.  Make static.
+       (scalar_move_insn_p): Consider sub-64-bit vector moves scalar.
+       * config/aarch64/iterators.md (VDDUP): New iterator.
+       (VQDUP): Likewise.
+       (elem_bits): Define attribute for sub-64-bit vector modes.
+       (Vetype): Likewise.
+       (VEL): Likewise.
+       (single_wx): Define attribute for sub-64-bit vector and scalar modes.
+       (single_type): Likewise.
+       (VCOND): Likewise.
+       (VCONQ): Likewise.
+       (Vqduptype): New mode attribute.
+       (Vdduptype): Likewise.
+       (vcond): Likewise.
+       (vconq): Likewise.
+       (vstype): Define attribute for 64-bit vector and sub-128-bit scalar
+       modes.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * config/aarch64/aarch64-modes.def (VECTOR_MODE): Remove V2HF.
+       (VECTOR_MODES): Define V2QI, V4QI, V2HI, V2HF, V2BF.
+       * config/aarch64/aarch64-protos.h
+       (aarch64_advsimd_sub_dword_mode_p): Declare new predicate.
+       * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): New
+       define_insn_and_split pattern.
+       (mov<mode>): Add sub-64-bit vector modes to the VALL_F16 expander.
+       Forego const vector expansion for those modes.
+       * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
+       Handle 16- and 32-bit vector modes.
+       (aarch64_advsimd_sub_dword_mode_p): Define new predicate.
+       (aarch64_vectorize_vec_perm_const): Refuse for partial vector modes.
+       * config/aarch64/constraints.md (Da): New constraint.
+       * config/aarch64/iterators.md (VSUB64): New iterator.
+       (VALL_F16_SUB64): Likewise.
+       (size): Define attribute for sub-64-bit vector modes.
+       (VSC): New mode attribute.
+       (vstype): Likewise.
+
+2026-05-28  Kewen Lin  <linkewen@hygon.cn>
+           Xin Liu  <liulxx@hygon.cn>
+
+       * config/i386/c86-4g-m7.md (c86_4g_m7_fpu): Remove automaton.
+       (c86_4g_m7_fpu02): New automaton.
+       (c86_4g_m7_fpu13): Ditto.
+       (c86-4g-m7-fpu0): Move to c86_4g_m7_fpu02 automaton.
+       (c86-4g-m7-fpu1): Move to c86_4g_m7_fpu13 automaton.
+       (c86-4g-m7-fpu2): Move to c86_4g_m7_fpu02 automaton.
+       (c86-4g-m7-fpu3): Move to c86_4g_m7_fpu13 automaton.
+       (c86-4g-m7-fdiv): Remove cpu unit.
+       (c86-4g-m7-fdiv1): New cpu unit.
+       (c86-4g-m7-fdiv3): Ditto.
+       (c86-4g-m7-fpu_0_3): New reservation.
+       (c86-4g-m7-fpu_1_3x2): Ditto.
+       (c86-4g-m7-fpu_1_3x3): Ditto.
+       (c86-4g-m7-fpu_1_3x6): Ditto.
+       (c86-4g-m7-fpux2): Ditto.
+       (c86-4g-m7-fpux4): Ditto.
+       (c86-4g-m7-fpux6): Ditto.
+       (c86-4g-m7-fpux8): Ditto.
+       (c86-4g-m7-fpux16): Ditto.
+       (c86-4g-m7-fp1fdiv1x4): Ditto.
+       (c86-4g-m7-fp3fdiv3x4): Ditto.
+       (c86-4g-m7-fdiv13): Ditto.
+       (c86-4g-m7-fp13div13): Ditto.
+       (c86-4g-m7-fp13div13x4): Ditto.
+       (c86-4g-m7-fp1div1_fp3div3_x4x8): Ditto.
+       (c86-4g-m7-fp1div1_fp3div3_x4x9): Ditto.
+       (c86-4g-m7-fp1div1_fp3div3_x4x11): Ditto.
+       (c86-4g-m7-fp1div1_fp3div3_x4x15): Ditto.
+       (c86-4g-m7-fp1div1_fp3div3_x4x18): Ditto.
+       (c86_4g_m7_idiv): New reservation.
+       (c86_4g_m7_idiv_QI): Adjust reservation latency and unit occupancy.
+       (c86_4g_m7_idiv_load): New reservation.
+       (c86_4g_m7_idiv_QI_load): Adjust reservation latency and unit
+       occupancy.
+       (c86_4g_m7_idiv_DI): Remove reservation.
+       (c86_4g_m7_idiv_SI): Ditto.
+       (c86_4g_m7_idiv_HI): Ditto.
+       (c86_4g_m7_idiv_DI_load): Ditto.
+       (c86_4g_m7_idiv_SI_load): Ditto.
+       (c86_4g_m7_idiv_HI_load): Ditto.
+       (c86_4g_m7_sse_insertimm): Adjust reservation units and unit
+       occupancy.
+       (c86_4g_m7_sse_insert): Ditto.
+       (c86_4g_m7_fp_sqrt): Adjust reservation.
+       (c86_4g_m7_fp_div): Ditto.
+       (c86_4g_m7_fp_div_load): Ditto.
+       (c86_4g_m7_fp_idiv_load): Ditto.
+       (c86_4g_m7_sse_pinsr_reg): Adjust reservation units and unit
+       occupancy.
+       (c86_4g_m7_sse_pinsr_reg_load): Ditto.
+       (c86_4g_m7_avx_vpinsr_reg): Ditto.
+       (c86_4g_m7_avx_vpinsr_reg_load): Ditto.
+       (c86_4g_m7_avx512_perm_xmm): Delete the prefix condition.
+       (c86_4g_m7_avx512_perm_xmm_opload): Ditto.
+       (c86_4g_m7_avx512_permi2_ymm): Adjust reservation units and unit
+       occupancy.
+       (c86_4g_m7_avx512_permi2_zmm): Ditto.
+       (c86_4g_m7_avx512_permi2_ymm_load): Ditto.
+       (c86_4g_m7_avx512_permi2_zmm_load): Ditto.
+       (c86_4g_m7_avx512_perm_zmm_imm): Ditto.
+       (c86_4g_m7_avx512_perm_zmm_imm_load): Ditto.
+       (c86_4g_m7_avx512_perm_zmm_noimm): Ditto.
+       (c86_4g_m7_sse_perm_zmm_noimm_load): Ditto.
+       (c86_4g_m7_avx_perm_ymm): Remove.
+       (c86_4g_m7_avx_perm_ymem): Ditto.
+       (c86_4g_m7_avx512_shuf_zmm): Adjust reservation units and unit
+       occupancy.
+       (c86_4g_m7_avx512_shuf_zmem): Ditto.
+       (c86_4g_m7_avx512_cmpestr): Ditto.
+       (c86_4g_m7_avx512_cmpestr_load): Ditto.
+       (c86_4g_m7_avx512_vdbpsadbw_zmm): Ditto.
+       (c86_4g_m7_avx512_vdbpsadbw_zmem): Ditto.
+       (c86_4g_m7_avx_ssecomi_comi): Ditto.
+       (c86_4g_m7_avx_ssecomi_comi_load): Ditto.
+       (c86_4g_m7_avx512_expand): Ditto.
+       (c86_4g_m7_avx512_expand_load): Ditto.
+       (c86_4g_m7_avx512_expand_z): Ditto.
+       (c86_4g_m7_avx512_expand_z_load): Ditto.
+       (c86_4g_m7_sse_movnt_xy): Rename to c86_4g_m7_sse_movnt.
+       (c86_4g_m7_avx512_sseadd_xy): Adjust reservation units.
+       (c86_4g_m7_avx512_sseadd_xy_load): Ditto.
+       (c86_4g_m7_sse_sseiadd_hplus): Adjust reservation units and unit
+       occupancy.
+       (c86_4g_m7_sse_sseiadd_hplus_load): Ditto.
+       (c86_4g_m7_avx512_ssemul): Adjust reservation units.
+       (c86_4g_m7_avx512_ssemul_load): Ditto.
+       (c86_4g_m7_avx512_ssediv): Remove.
+       (c86_4g_m7_avx512_ssediv_mem): Remove.
+       (c86_4g_m7_avx512_ssediv_x): New.
+       (c86_4g_m7_avx512_ssediv_xmem): New.
+       (c86_4g_m7_avx512_ssediv_y): New.
+       (c86_4g_m7_avx512_ssediv_ymem): New.
+       (c86_4g_m7_avx512_ssediv_z): Adjust reservation units.
+       (c86_4g_m7_avx512_ssediv_zmem): Ditto.
+       (c86_4g_m7_avx512_ssecmp_z): Add reservation units and unit
+       occupancy.
+       (c86_4g_m7_avx512_ssecmp_z_load): Ditto.
+       (c86_4g_m7_avx512_ssecmp_vp_z): New reservation.
+       (c86_4g_m7_avx512_ssecmp_vp_z_load): Ditto.
+       (c86_4g_m7_avx512_ssecmp_test_z): Remove reservation.
+       (c86_4g_m7_avx512_ssecmp_test_z_load): Ditto.
+       (c86_4g_m7_avx512_muladd): Broaden matching condition.
+       (c86_4g_m7_avx512_muladd_load): Ditto.
+       (c86_4g_m7_fma_muladd): Remove reservation.
+       (c86_4g_m7_fma_muladd_load): Ditto.
+       (c86_4g_m7_avx512_sse_conflict_x): Add reservation units and unit
+       occupancy.
+       (c86_4g_m7_avx512_sse_conflict_x_load): Ditto.
+       (c86_4g_m7_avx512_sse_conflict_y): Ditto.
+       (c86_4g_m7_avx512_sse_conflict_y_load): Ditto.
+       (c86_4g_m7_avx512_sse_conflict_z): Ditto.
+       (c86_4g_m7_avx512_sse_conflict_z_load): Ditto.
+       (c86_4g_m7_avx512_sse_class_z): Add reservation units and unit
+       occupancy.
+       (c86_4g_m7_avx512_sse_class_z_load): Ditto.
+       (c86_4g_m7_avx512_sse_sqrt): Remove.
+       (c86_4g_m7_avx512_sse_sqrt_load): Remove.
+       (c86_4g_m7_avx512_sse_sqrt_sf_x): New.
+       (c86_4g_m7_avx512_sse_sqrt_sf_xload): New.
+       (c86_4g_m7_avx512_sse_sqrt_sf_y): New.
+       (c86_4g_m7_avx512_sse_sqrt_sf_yload): New.
+       (c86_4g_m7_avx512_sse_sqrt_sf_z): New.
+       (c86_4g_m7_avx512_sse_sqrt_sf_zload): New.
+       (c86_4g_m7_avx512_sse_sqrt_df_x): New.
+       (c86_4g_m7_avx512_sse_sqrt_df_xload): New.
+       (c86_4g_m7_avx512_sse_sqrt_df_y): New.
+       (c86_4g_m7_avx512_sse_sqrt_df_yload): New.
+       (c86_4g_m7_avx512_sse_sqrt_df_z): New.
+       (c86_4g_m7_avx512_sse_sqrt_df_zload): New.
+       (c86_4g_m7_avx512_msklog_vector): Add reservation units and unit
+       occupancy.
+       (c86_4g_m7_avx512_mskmov_z_k): Ditto.
+       (c86_4g_m7_avx512_mskmov_k_reg): Ditto.
+       * config/i386/c86-4g.md (c86_4g_fp): Remove automaton.
+       (c86_4g_fp024): New automaton.
+       (c86_4g_fp1): Ditto.
+       (c86-4g-fp0): Move to c86_4g_fp024 automaton.
+       (c86-4g-fp1): Move to c86_4g_fp1 automaton.
+       (c86-4g-fp2): Move to c86_4g_fp024 automaton.
+       (c86-4g-fp3): Ditto.
+       (c86-4g-fp1fdivx4): New reservation.
+       (c86_4g_fp_sqrt): Adjust reservation.
+       (c86_4g_sse_sqrt_sf): Ditto.
+       (c86_4g_sse_sqrt_sf_mem): Ditto.
+       (c86_4g_sse_sqrt_df): Ditto.
+       (c86_4g_sse_sqrt_df_mem): Ditto.
+       (c86_4g_fp_op_div): Ditto.
+       (c86_4g_fp_op_div_load): Ditto.
+       (c86_4g_fp_op_idiv_load): Adjust reservation latency.
+       (c86_4g_ssediv_ss_ps): Adjust reservation.
+       (c86_4g_ssediv_ss_ps_load): Ditto.
+       (c86_4g_ssediv_sd_pd): Ditto.
+       (c86_4g_ssediv_sd_pd_load): Ditto.
+       (c86_4g_ssediv_avx256_ps): Ditto.
+       (c86_4g_ssediv_avx256_ps_load): Ditto.
+       (c86_4g_ssediv_avx256_pd): Ditto.
+       (c86_4g_ssediv_avx256_pd_load): Ditto.
+
+2026-05-28  Zhongyao Chen  <chen.zhongyao@zte.com.cn>
+
+       * config/riscv/riscv-vector-costs.cc
+       (estimated_loop_iters): New function.
+       (compare_loop_overhead): New function.
+       (costs::better_main_loop_than_p): Compare RVV loop overhead after
+       inside-loop cost.
+
+2026-05-28  Alex Coplan  <alex.coplan@arm.com>
+
+       * config/aarch64/aarch64.cc (aarch64_strip_extend): Replace
+       (unsigned HOST_WIDE_INT) INVAL (x) with UINTVAL (x).
+       * config/aarch64/predicates.md (aarch64_shift_imm_si): Likewise.
+       (aarch64_shift_imm_di): Likewise.
+       (aarch64_shift_imm64_di): Likewise.
+       (aarch64_imm3): Likewise.
+
+2026-05-28  Georg-Johann Lay  <avr@gjlay.de>
+
+       * config/avr/avr.cc (avr_read_number, avr_length_of_asm)
+       (avr_maybe_length_of_asm): New static functions.
+       (avr_adjust_insn_length): Call avr_maybe_length_of_asm on
+       unrecognized insns.
+       * config/avr/avr.opt (-masm-len-notes, -Wasm-len-notes): New
+       options.
+       * doc/invoke.texi (AVR Options): Add -masm-len-notes,
+       -Wasm-len-notes.
+       * doc/extend.texi (Size of an asm): Add @subsubheading
+       "Specifying the size of an asm on AVR".
+
+2026-05-28  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR target/121343
+       * config/avr/avr.md (divmod<mode>4, udivmod<mode>4): Use
+       hard-reg constraints instead of explicit hard-regs.
+       (*divmodqi4_call_split, *udivmodqi4_call_split): Remove.
+       (*divmodhi4_call_split, *udivmodhi4_call_split): Remove.
+       (*divmodpsi4_call_split, *udivmodpsi4_call_split): Remove.
+       (*divmodsi4_call_split, *udivmodsi4_call_split): Remove.
+
+2026-05-28  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/125469
+       * config/i386/i386.md (*add<mode>_1<nf_name>): Don't return "#" for
+       the lea non-TARGET_APX_NDD case, instead emit a lea directly.
+
 2026-05-27  Philipp Tomsich  <philipp.tomsich@vrull.eu>
            Konstantinos Eleftheriou  <konstantinos.eleftheriou@vrull.eu>
 
index 70406bf9d422b3c677b7c26688c08895775f8b1c..24d57167af433c0be5adb01e2b8329141863c64f 100644 (file)
@@ -1 +1 @@
-20260528
+20260529
index ab6448b2de6a7be25eb4b5a6eef0a40fd0c836e7..4dfdfd12fc662caaef14478fc2be9aeb0ef113f3 100644 (file)
@@ -1,3 +1,273 @@
+2026-05-28  Sebastian Poeplau  <poeplau@adacore.com>
+
+       * init.c (__gnat_alternate_stack): add alignment attribute.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * sem_aggr.adb (Resolve_Array_Aggregate): Also rewrite a choice list
+       with a single choice as an iterator specification when the choice's
+       type has the GNAT Iterable aspect specified.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * sem_aggr.adb (Resolve_Array_Aggregate): Analyze the choice before
+       testing whether it is the name of a subtype with a predicate.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * einfo.ads (In_Package_Body): Update description.
+       (In_Private_Part): Likewise.
+       * sem_ch3.adb (Analyze_Object_Declaration): Compute In_Package_Body
+       along with In_Private_Part for the object if its scope is a package.
+       * sem_ch6.adb (Analyze_Expression_Function): Do not compute
+       In_Private_Part here.
+       (Enter_Overloaded_Entity): Compute In_Package_Body & In_Private_Part
+       for the entity if its scope is a package.
+       * sem_util.adb (Collect_Primitive_Operations): Skip the subprograms
+       declared in the body for types declared in a package specification.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * sem_ch13.adb (Resolve_Aspect_Aggregate.Resolve_Operation): Add
+       missing guard for the presence of Entity on the node.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * doc/gnat_rm/gnat_language_extensions.rst
+       (Generalized Finalization): Document the new restriction.
+       * sem_ch13.adb (Resolve_Finalizable_Argument): Adjust wording of
+       error message.
+       (Resolve_Finalization_Procedure.Is_Finalizable_Primitive): Require
+       the procedure to be a primitive operation.
+       * gnat_rm.texi: Regenerate.
+
+2026-05-28  Piotr Trojanek  <trojanek@adacore.com>
+
+       * libgnat/g-comlin.adb
+       (Command_Name): New routine to strip platform-specific suffix.
+       (Display_Help, Get_Opt): Use new routine.
+       (Try_Help): Remove hardcoded ".exe" suffix; use new routine.
+
+2026-05-28  Javier Miranda  <miranda@adacore.com>
+
+       * sem_util.adb (Is_Access_To_Subprogram_Wrapper): Remove useless
+       call to Can_Have_Formals. Found by Dismukes.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * exp_ch3.adb (Make_Controlling_Function_Wrappers): Manually set the
+       Has_Controlling_Result flag on the wrappers.
+       * sem_disp.ads (Override_Dispatching_Operation): Move to...
+       * sem_disp.adb (Override_Dispatching_Operation): ...here.
+       (Find_Dispatching_Type): Return the (controlling) result type for a
+       controlling function wrapper.
+
+2026-05-28  Vadim Godunko  <godunko@adacore.com>
+
+       * doc/gnat_rm/implementation_of_ada_2022_features.rst: Fix casing.
+       * gnat_rm.texi: Regenerate.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * exp_ch4.adb (Expand_N_Op_Eq): Do not expand an array comparison
+       for validity checking purposes when the component type is covered
+       by the suppression of validity checks.
+
+2026-05-28  Marc Poulhiès  <poulhies@adacore.com>
+
+       * vast.adb (Do_Node_Pass_2): Only check aspect/pragma consistency for pragma nodes.
+
+2026-05-28  Javier Miranda  <miranda@adacore.com>
+
+       * sem_util.ads (Is_Access_Subprogram_Wrapper): Renamed as
+       Is_Access_To_Subprogram_Wrapper.
+       * sem_util.adb (Is_Access_Subprogram_Wrapper): Ditto plus add
+       assertion.
+       * sem_disp.adb (Is_Access_To_Subprogram_Wrapper): Removed.
+       * sem_prag.adb (Find_Related_Declaration_Or_Body): Replace call to
+       Is_Access_Subprogram_Wrapper by call to Is_Access_To_Subprogram_Wrapper.
+       * exp_ch6.adb (Expand_Call): Ditto.
+       * sem_attr.adb (Analyze_Attribute [Attribute_Result]): For access to
+       subprogram wrappers, report that the expected prefix is the name of
+       the access type.
+
+2026-05-28  Marc Poulhiès  <poulhies@adacore.com>
+
+       * sem_ch13.adb (Make_Pragma_From_Boolean_Aspect): Use Decorate.
+
+2026-05-28  Bob Duff  <duff@adacore.com>
+
+       * sem_ch13.adb (Analyze_Aspect_Specifications):
+       Major rewrite.
+       * sem_ch13.ads: Minor comment improvements.
+       * aspects.ads: Change some aspects to be Never_Delay.
+       Make Boolean_Aspects include Library_Unit_Aspects.
+       * exp_ch9.adb (Build_Corresponding_Record):
+       When copying aspects, set Aspect_Rep_Item to Empty,
+       so Asp_Copy looks like an unanalyzed tree.
+       * sem_ch12.adb (Analyze_Formal_Subprogram_Declaration):
+       Skip Analyze_Aspect_Specifications in case of error.
+       * sem_ch6.adb (Analyze_Expression_Function): Likewise.
+       * sinfo.ads: Minor comment improvement.
+
+2026-05-28  Steve Baird  <baird@adacore.com>
+
+       * sem_ch6.adb (Install_Entity): If the entity to be installed is
+       already installed, assert that an error has already been flagged
+       and then return without introducing a cycle in the entity's
+       Homonyms list.
+
+2026-05-28  Viljar Indus  <indus@adacore.com>
+
+       * errout.adb (Output_Messages): use the source file name without
+       the directory path when constructing the name of the SARIF file.
+       * osint.adb (Strip_Directory): New method for extracting the file name
+       from a given path.
+       * osint.ads (Strip_Directory): Likewise.
+
+2026-05-28  Javier Miranda  <miranda@adacore.com>
+
+       * sem_ch8.adb (Find_Renamed_Entity): Protect call to First_Formal.
+
+2026-05-28  Javier Miranda  <miranda@adacore.com>
+
+       * sem_res.adb (Resolve_Declare_Expression): Do not create a
+       transient scope when expansion is disabled.
+
+2026-05-28  Javier Miranda  <miranda@adacore.com>
+
+       * sem_res.adb (Resolve_Declare_Expression): Do not create a
+       transient scope under GNATprove mode.
+
+2026-05-28  Bob Duff  <duff@adacore.com>
+
+       * vast.adb (Pass): Add a comment.
+
+2026-05-28  Marc Poulhiès  <poulhies@adacore.com>
+
+       * vast.adb (Do_Node_Pass_2): Adjust check for aspect consistency.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * exp_attr.adb (Expand_N_Attribute_Reference) <Constrained>: If the
+       prefix is a non-In formal parameter of an unchecked union type, give
+       a warning and insert a raise statement for Program_Error.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * exp_util.ads (Is_Distributable_Declaration): New predicate.
+       * exp_util.adb (Is_Distributable_Declaration): New predicate coming
+       from Expand_N_Case_Expression and Expand_N_If_Expression.  Return
+       False for variables of an unconstrained definite nonlimited subtype.
+       * exp_ch4.adb (Expand_N_Case_Expression): Replace calls to local
+       Is_Optimizable_Declaration by calls to Is_Distributable_Declaration.
+       (Expand_N_If_Expression): Likewise.
+       * exp_ch6.adb (Expand_Ctrl_Function_Call): Likewise.
+
+2026-05-28  Bob Duff  <duff@adacore.com>
+
+       * sem_ch13.adb (Insert_Pragma):
+       Rename to be Insert_Aitem.
+
+2026-05-28  Bob Duff  <duff@adacore.com>
+
+       * sem_ch13.adb (Analyze_Aspect_Specifications):
+       Misc cleanup.
+
+2026-05-28  Claire Dross  <dross@adacore.com>
+
+       * inline.adb (Can_Be_Inlined_In_GNATprove_Mode):
+       Do not inline subprograms with formals of an unchecked union type.
+
+2026-05-28  Marc Poulhiès  <poulhies@adacore.com>
+           Eric Botcazou  <botcazou@adacore.com>
+
+       * sem_ch3.adb (Find_Type_Of_Object): Adjust freezing of the base
+       type of a discriminated type.
+
+2026-05-28  Ronan Desplanques  <desplanques@adacore.com>
+
+       * sem_ch3.adb (Process_Full_View): Simplify test.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * accessibility.adb
+       (Apply_Accessibility_Check_For_Class_Wide_Return): Do not test if
+       accessibility checks are suppressed here but...
+       (Apply_Accessibility_Check_For_Return): ...here instead.
+
+2026-05-28  Viljar Indus  <indus@adacore.com>
+
+       * sem_ch6.adb (Check_For_Primitive_Subprogram): add the
+       check for ghost equality functions for all branches handling
+       primitive subprograms.
+
+2026-05-28  Ronan Desplanques  <desplanques@adacore.com>
+
+       * sem_aux.ads (Is_Immutably_Limited_Type, Is_Inherently_Limited_Type):
+       Improve documentation comments.
+       * sem_aux.adb (Is_Inherently_Limited_Type): Replace inline code with
+       call to Is_Immutably_Limited_Type.
+
+2026-05-28  Bob Duff  <duff@adacore.com>
+
+       * aspects.ads (Aspect_Initialize):
+       Add to Implementation_Defined_Aspect.
+       * einfo.ads (Alignment_Clause): Minor comment fix.
+       * sem.adb: Remove useless null statements.
+       * sem_ch13.ads (Rep_Item_Too_Late):
+       Minor comment fix (this IS Sem_Ch13).
+       * sem_prag.adb (Fix_Error):
+       Minor comment fix (aspects are not "abnormal").
+       * sinfo.ads: Minor comment fix.
+
+2026-05-28  Javier Miranda  <miranda@adacore.com>
+
+       * gen_il-fields.ads (Scope_Link): New field.
+       * gen_il-gen-gen_nodes.adb (N_Expression_With_Actions): Added Scope_Link.
+       * sinfo.ads (N_Expression_With_Actions): Add field Scope_Link.
+       * sem_ch4.adb (Analyze_Expression_With_Actions): Set field Scope_Link
+       * sem_ch5.ads (Has_Sec_Stack_Call): Declaration moved to the package spec.
+       * sem_ch5.adb (Has_Sec_Stack_Call): ditto.
+       * sem_res.adb (Resolve_Declare_Expression): Push/Pop internally created
+       scope to provide proper visibility of the declare_items.
+
+2026-05-28  Denis Mazzucato  <mazzucato@adacore.com>
+
+       * sem_prag.adb (Check_References): Don't call Class_Wide_Type if the
+       subprogram is a non-primitive procedure as the dispatching type may be
+       empty.
+
+2026-05-28  Piotr Trojanek  <trojanek@adacore.com>
+
+       * exp_ch9.adb (Is_Pure_Barrier): Handle unexpanded attribute Count.
+
+2026-05-28  Bob Duff  <duff@adacore.com>
+
+       * vast.adb (Check_Corresponding_Aspect):
+       New checks for aspect/pragma consistency.
+       (Check_Enum): Add documentation of the checks.
+
+2026-05-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * exp_ch9.ads (Build_Master_Declaration): Minor tweaks in comment.
+       (Build_Master_Entity): Likewise.
+       (Build_Master_Renaming): Likewise.
+       (Build_Master_Renaming_Declaration): New function declaration.
+       * exp_ch9.adb (Build_Master_Declaration): Move around.
+       (Build_Master_Renaming_Declaration): New function.
+       (Build_Master_Renaming): Call Build_Master_Renaming_Declaration
+       to build the renaming declaration.
+       * sem_ch6.adb (Check_Anonymous_Access_Return_With_Tasks): Remove
+       useless guard on Declarations (N).  Create a renaming declaration
+       for the current _Master variable and set is as the Master_Id of
+       the access result type.
+
+2026-05-28  Piotr Trojanek  <trojanek@adacore.com>
+
+       * exp_spark.adb (Expand_SPARK_N_Delta_Aggregate): Special case for
+       "others" clause.
+
 2026-05-27  Iain Sandoe  <iain@sandoe.co.uk>
 
        * xsintnam.sed: Posix-ify the a, c and i commands.
index 3d0418fcc3138a826231fed5ab03601964cd129a..97961460f45c5ed31416b5e4d4749e9cd65d2aff 100644 (file)
@@ -1,3 +1,9 @@
+2026-05-28  Jonathan Wakely  <jwakely@redhat.com>
+
+       PR cobol/125404
+       * symfind.cc (symbol_find): Add assertion that ancestors vector
+       is not empty.
+
 2026-05-12  Robert Dubner  <rdubner@symas.com>
 
        * Make-lang.in: Incorporate new gcc/cobol/compare.cc file.
index 301620f61a8dbbcdea1a1b8bed2000b2f35da56a..8454418e56c0516ec060942dfe682deb0ec68437 100644 (file)
@@ -1,3 +1,8 @@
+2026-05-28  Marek Polacek  <polacek@redhat.com>
+
+       PR c++/125454
+       * typeck.cc (cp_build_array_ref): Don't recurse for array[array].
+
 2026-05-27  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/125412
index abc34cefeac1a2f041f4d471ae3ed96e65a109a5..e6392b01a146391d6701ebf01c4a32aea6a8b61e 100644 (file)
@@ -1,3 +1,36 @@
+2026-05-28  Sandra Loosemore  <sloosemore@baylibre.com>
+
+       * intrinsic.texi (F_C_STRING): New section.
+       * trans-intrinsic.cc (conv_trim): Delete.
+       (conv_isocbinding_function): Rewrite the F_C_STRING case.
+
+2026-05-28  Sandra Loosemore  <sloosemore@baylibre.com>
+           Tobias Burnus  <tburnus@baylibre.com>
+
+       * check.cc (gfc_check_c_f_strpointer): New.
+       * f95-lang.cc (gfc_init_builtin_functions): Add BUILT_IN_STRNLEN.
+       * gfortran.h (enum gfc_isym_id): Add GFC_ISYM_C_F_STRPOINTER.
+       * gfortran.texi (Interoperable Subroutines and Functions): Mention
+       f_c_string and c_f_strpointer.
+       * intrinsic.cc (add_subroutines): Add c_f_strpointer.  Fix nearby
+       whitespace errors.
+       (sort_actual): Handle first argument to c_f_strpointer specially.
+       * intrinsic.h (gfc_check_c_f_strpointer): Declare.
+       * intrinsic.texi (C_F_STRPOINTER): New section.  Add entry to menu
+       and cross-references from similar functions.
+       * iso-c-binding.def: Add c_f_strpointer.
+       * trans-intrinsic.cc (conv_isocbinding_subroutine_strpointer): New.
+       (gfc_conv_intrinsic_subroutine): Call it.
+
+2026-05-28  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+       PR fortran/125430
+       * trans-decl.cc (build_function_decl): Set TREE_PUBLIC for all
+       module-contained procedures so submodules compiled as separate
+       translation units can reach them via host association.  Also set
+       DECL_VISIBILITY to VISIBILITY_HIDDEN for PRIVATE procedures,
+       matching the existing treatment of module variables.
+
 2026-05-26  Paul-Antoine Arras  <parras@baylibre.com>
 
        * dump-parse-tree.cc (debug): Add debug functions for gfc_omp_namelist
index 92a6f73e45271f9b99820ea7d60ee4694df2ef1a..187284dd5e5da67eeb22ff96fa0a3f7ed62eed13 100644 (file)
@@ -1,3 +1,177 @@
+2026-05-28  Sandra Loosemore  <sloosemore@baylibre.com>
+
+       * gfortran.dg/f_c_string3.f90: New.
+       * gfortran.dg/f_c_string4.f90: New.
+       * gfortran.dg/f_c_string5.f90: New.
+
+2026-05-28  Sandra Loosemore  <sloosemore@baylibre.com>
+           Tobias Burnus  <tburnus@baylibre.com>
+
+       * gfortran.dg/c_f_strpointer-1.f90: New.
+       * gfortran.dg/c_f_strpointer-2.f90: New.
+       * gfortran.dg/c_f_strpointer-3.f90: New.
+       * gfortran.dg/c_f_strpointer-4.f90: New.
+       * gfortran.dg/c_f_strpointer-5.f90: New.
+       * gfortran.dg/c_f_strpointer-6.f90: New.
+       * gfortran.dg/c_f_strpointer-7.f90: New.
+       * gfortran.dg/c_f_strpointer-8.f90: New.
+       * gfortran.dg/c_f_strpointer-9.f90: New.
+       * gfortran.dg/c_f_strpointer-10.f90: New.
+       * gfortran.dg/pr108961.f90: Rename locally-defined c_f_strpointer.
+
+2026-05-28  Jean-Christian CÎRSTEA  <jean.christian.cirstea@gmail.com>
+
+       PR c++/120458
+       * g++.dg/README: Explain purpose of modules/ dir.
+       * g++.dg/modules/pr120458-1_a.C: Define non-ASCII module with
+       default mapper.
+       * g++.dg/modules/pr120458-1_b.C: Import non-ASCII module with
+       default mapper.
+       * g++.dg/modules/pr120458-2_a.C: Define non-ASCII module with
+       a file as mapper.
+       * g++.dg/modules/pr120458-2_b.C: Import non-ASCII module with
+       a file as mapper.
+       * g++.dg/modules/pr120458-2.map: Define mapping for pr120458-2
+       test case.
+
+2026-05-28  H.J. Lu  <hjl.tools@gmail.com>
+
+       * gcc.dg/vect/vect-early-break-no-epilog_11.c: Require
+       avx512f_runtime instead of avx512f_hw.
+
+2026-05-28  Roger Sayle  <roger@nextmovesoftware.com>
+           Hongtao Liu  <hongtao.liu@intel.com>
+
+       * gcc.target/i386/sse4_1-ptest-7.c: New test case.
+
+2026-05-28  Roger Sayle  <roger@nextmovesoftware.com>
+           Hongtao Liu  <hongtao.liu@intel.com>
+           Uros Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/avx512f-simd-1.c: Tweak test case.
+       * gcc.target/i386/sse2-paddb-2.c: New test case.
+       * gcc.target/i386/sse2-paddd-2.c: Likewise.
+       * gcc.target/i386/sse2-paddw-2.c: Likewise.
+       * gcc.target/i386/sse2-psubb-2.c: Likewise.
+       * gcc.target/i386/sse2-psubd-2.c: Likewise.
+       * gcc.target/i386/sse2-psubw-2.c: Likewise.
+
+2026-05-28  Marek Polacek  <polacek@redhat.com>
+
+       PR c++/125454
+       * g++.dg/other/array8.C: New test.
+
+2026-05-28  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+       PR fortran/125430
+       * gfortran.dg/module_private_2.f90: Remove scan-tree-dump-times
+       assertion for 'priv'; PRIVATE module procedures now have global
+       linkage with hidden visibility and are no longer optimized away.
+       * gfortran.dg/public_private_module_2.f90: Add xfail markers to
+       scan-assembler-not for 'two' and 'six'; update comment to mention
+       procedures alongside variables.
+       * gfortran.dg/public_private_module_7.f90: Add xfail marker to
+       scan-assembler-not for '__m_common_attrs_MOD_other'.
+       * gfortran.dg/public_private_module_8.f90: Add xfail marker to
+       scan-assembler-not for '__m_MOD_myotherlen'.
+       * gfortran.dg/submodule_private_host.f90: New test.
+       * gfortran.dg/submodule_private_host_aux.f90: New auxiliary file.
+       * gfortran.dg/warn_unused_function_2.f90: Remove 'defined but not
+       used' expectation for s1; PRIVATE module procedures now have
+       global linkage and no longer trigger the unused-function warning.
+
+2026-05-28  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       * gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c: Adjust expected
+       output.
+       * gcc.target/riscv/amo/a-rvwmo-store-relaxed.c: Likewise.
+       * gcc.target/riscv/amo/a-rvwmo-store-release.c: Likewise.
+       * gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c: Likewise.
+       * gcc.target/riscv/amo/a-ztso-store-relaxed.c: Likewise.
+       * gcc.target/riscv/amo/a-ztso-store-release.c: Likewise.
+       * gcc.target/riscv/amo/zalasr-rvwmo-store-compat-seq-cst.c: Likewise.
+       * gcc.target/riscv/amo/zalasr-rvwmo-store-relaxed.c: Likewise.
+       * gcc.target/riscv/amo/zalasr-rvwmo-store-release.c: Likewise.
+       * gcc.target/riscv/amo/zalasr-ztso-store-compat-seq-cst.c: Likewise.
+       * gcc.target/riscv/amo/zalasr-ztso-store-relaxed.c: Likewise.
+       * gcc.target/riscv/amo/zalasr-ztso-store-release.c: Likewise.
+       * gcc.target/riscv/cpymem-64-ooo.c: Likewise.
+       * gcc.target/riscv/cpymem-64.c: Likewise.
+       * gcc.target/riscv/memcpy-nonoverlapping.c: Likewise.
+       * gcc.target/riscv/pr67731.c: Likewise.
+
+2026-05-28  Marek Polacek  <polacek@redhat.com>
+
+       PR c++/106957
+       * g++.dg/cpp2a/lambda-uneval32.C: New test.
+
+2026-05-28  Jin Ma  <jinma@linux.alibaba.com>
+
+       * gcc.target/riscv/fp-reg-class.c: New test.
+
+2026-05-28  Zhongyao Chen  <chen.zhongyao@zte.com.cn>
+
+       * gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c: Update expected LMUL counts.
+       * gcc.target/riscv/rvv/autovec/dyn-lmul-conv-2.c: Likewise.
+       * gcc.target/riscv/rvv/autovec/pr123414.c: Disable vector cost model.
+
+2026-05-28  Tamar Christina  <tamar.christina@arm.com>
+
+       * gcc.dg/vect/vect-early-break-no-epilog_11.c: Add AVX512 for x86_64.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * gcc.target/aarch64/sve/vec_init_5.c: New test.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * gcc.target/aarch64/sve/gather_load_10.c: Adjust testcase.
+       * gcc.target/aarch64/sve/slp_1.c: Likewise.
+       * gcc.target/aarch64/vec-init-18.c: Likewise.
+       * gcc.target/aarch64/vec-init-23.c: Likewise.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * gcc.target/aarch64/ldp_stp_16.c: Adjust testcase.
+       * gcc.target/aarch64/sve/slp_1.c: Likewise.
+       * gcc.target/aarch64/vec-init-18.c: Likewise.
+       * gcc.target/aarch64/vec-init-23.c: New test.
+
+2026-05-28  Artemiy Volkov  <artemiy.volkov@arm.com>
+
+       * gcc.dg/vect/complex/bb-slp-complex-add-half-float.c: Adjust testcase.
+       * gcc.dg/vect/complex/bb-slp-complex-mla-half-float.c: Likewise.
+       * gcc.dg/vect/complex/bb-slp-complex-mul-half-float.c: Likewise.
+       * gcc.target/aarch64/sve/slp_1.c: Likewise.
+
+2026-05-28  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/125469
+       * gcc.target/i386/apx-nf-pr125469.c: New test.
+
+2026-05-28  oltolm  <oleg.tolmatcev@gmail.com>
+
+       PR target/54412
+       * gcc.target/i386/pr54412-v4d-o0-aligned-locals.c: New test.
+       * gcc.target/i386/pr54412-o2-by-value-cases.c: New test.
+       * gcc.target/i386/pr54412-sret-no-args.c: New test.
+       * gcc.target/i386/pr54412-callee-byref-param.c: New test.
+       * gcc.target/i386/pr54412-avx512-aligned64.c: New test.
+
+2026-05-28  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       * gcc.target/riscv/rvv/base/pr115456-3.c: Drop compromised scan-asm
+       part of the test.
+
+2026-05-28  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+       PR fortran/93727
+       * gfortran.dg/EXformat_3.F90: New test covering rounding for
+       KIND=4, 8, 10, and 16: clear round-up, ties-to-even (truncate
+       and round-up cases), carry propagation, and normalization.
+       * gfortran.dg/EXrounding.F90: New test checking the various
+       rounding modes for all kinds.
+
 2026-05-27  Marek Polacek  <polacek@redhat.com>
 
        * g++.dg/warn/Winvalid-memory-model-2.C: Adjust dg-regexp.
index c5b5479afa6d26ee5d905d4e89c5ee6e8a7ffe57..c9eaa219d8b04f9103b7998c8735a4f2fa1174d7 100644 (file)
@@ -1,3 +1,9 @@
+2026-05-28  Jean-Christian CÎRSTEA  <jean.christian.cirstea@gmail.com>
+
+       PR c++/120458
+       * buffer.cc (S2C): Allow non-ASCII chars in quoted words.
+       * cody.hh: Use unsigned char for S2C().
+
 2025-11-21  Jakub Jelinek  <jakub@redhat.com>
 
        * cody.hh (S2C): For __cpp_char8_t >= 201811 use char8_t instead of
index c6e9cc647c8816a5b016090605a16df8f477a067..325b18d392d2a90b2837a1cabebc424e1eb32529 100644 (file)
@@ -1,3 +1,8 @@
+2026-05-28  Georg-Johann Lay  <avr@gjlay.de>
+
+       * libf7.h: Add "[len=...]]" notes to all non-empty inline asm's.
+       * libf7.c: Dito.
+
 2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
 
        PR target/122222
index 0b8ba591e71dbd2a3942594c1d22f2b871a47fd7..033fea9e404fc752130c8c2e5418be3f6a64eae4 100644 (file)
@@ -1,3 +1,12 @@
+2026-05-28  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+       PR fortran/93727
+       * io/write.c (write_ex): Replace simple truncation with
+       rounding-aware logic respecting dtp round_status.  Add carry
+       propagation and integer-digit normalization.
+       * io/write_float.def: Change use of GFC_UINTEGER_8 to
+       long long unsigned.
+
 2026-05-25  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
        PR fortran/93727
index e21d29e58836415c14bf8e1f4e7c0deef053b95f..28c2c72fbf7afe9d59c30813dd508365762262a2 100644 (file)
@@ -1,3 +1,91 @@
+2026-05-28  Patrick Palka  <ppalka@redhat.com>
+
+       * testsuite/util/testsuite_allocator.h
+       (uneq_allocator::allocate): Use __try/__catch instead.
+       (uneq_allocator::allocate_at_least): Likewise.
+
+2026-05-28  Patrick Palka  <ppalka@redhat.com>
+
+       * include/std/flat_map (flat_map): Bring in operator= from
+       _Flat_map_base.
+       (flat_multimap): Likewise.
+       * include/std/flat_set (flat_set): Bring in operator= from
+       _Flat_set_base.
+       (flat_multiset): Likewise.
+       * testsuite/23_containers/flat_map/1.cc (test11): Simplify by
+       using = {...}.
+       (test12): New test.
+       * testsuite/23_containers/flat_multimap/1.cc (test10): Simplify
+       by using = {...}.
+       (test11): New test.
+       * testsuite/23_containers/flat_multiset/1.cc (test10): Simplify
+       by using = {...}.
+       (test11): New test.
+       * testsuite/23_containers/flat_set/1.cc (test10): Simplify by
+       using = {...}.
+       (test11): New test.
+
+2026-05-28  Patrick Palka  <ppalka@redhat.com>
+
+       * include/bits/version.def (flat_map): Bump to 202511.
+       (flat_set): Likewise.
+       * include/bits/version.h: Regenerate.
+       * include/std/flat_map (_Flat_map_impl): Remove
+       is_nothrow_swappable_v assertions.
+       (_Flat_map_impl::_Flat_map_impl): Explicitly default copy ctor.
+       Define move ctor with corrected exception handling as per
+       P3567R2.
+       (_Flat_map_impl::operator=): Likewise.
+       (_Flat_map_impl::insert_range): Define new __sorted_t overload
+       as per P3567R2.
+       (_Flat_map_impl::swap): Make conditionally noexcept as per
+       P3567R2.
+       * include/std/flat_set (_Flat_set_impl): Remove
+       is_nothrow_swappable_v assertion.
+       (_Flat_set_impl::_Flat_set_impl): Explicitly default copy ctor.
+       Define move ctor with correct invariant preserving behavior as
+       per P3567R2.
+       (_Flat_set_impl::operator=): Likewise.
+       (_Flat_set_impl::_M_insert_range): Factored out from
+       insert_range.  Add bool parameter __is_sorted defaulted to
+       false.
+       (_Flat_set_impl::insert_range): Define new __sorted_t overload
+       as per P3567R2.
+       (_Flat_set_impl::swap): Make conditionally noexcept as per
+       P3567R2.  Correct to use ranges::swap instead of ADL swap.
+       * testsuite/23_containers/flat_map/1.cc (test11, test12):
+       New tests.
+       * testsuite/23_containers/flat_multimap/1.cc (test10, test11):
+       New tests.
+       * testsuite/23_containers/flat_multiset/1.cc (test10, test11):
+       New tests.
+       * testsuite/23_containers/flat_set/1.cc (test10, test11):
+       New tests.
+
+2026-05-28  Patrick Palka  <ppalka@redhat.com>
+
+       * include/std/flat_map (_Flat_map_impl::_M_insert): New bool
+       parameter __is_sorted defaulted to false.  Reimplement using
+       views::zip and ranges::inplace_merge.
+       (_Flat_map_impl::insert): In the __sorted_t overload, pass
+       __is_sorted=true to _M_insert.
+
+2026-05-28  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+       * include/bits/random.h (piecewise_constant_distribution::param_type)
+       (piecewise_linear_distribution::param_type): Befriend operator<<.
+       * include/bits/random.tcc
+       (operator<<(basic_ostream&, piecewise_linear_distribution))
+       (operator<<(basic_ostream&, piecewise_constant_distribution)):
+       Use __x._M_param._M_int and __x._M_param._M_den instead of accessors.
+
+2026-05-28  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+       * testsuite/26_numerics/random/piecewise_constant_distribution/operators/serialize2.cc:
+       New test.
+       * testsuite/26_numerics/random/piecewise_linear_distribution/operators/serialize2.cc:
+       New test.
+
 2026-05-26  Tomasz Kamiński  <tkaminsk@redhat.com>
 
        * include/std/ranges (ref_view::size()): Only call ranges::size(*_M_r).