KVM: SVM: Advertise TSA CPUID bits to guests

Commit 31272abd5974b38ba312e9cf2ec2f09f9dd7dcba upstream.

Synthesize the TSA CPUID feature bits for guests. Set TSA_{SQ,L1}_NO on
unaffected machines.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index c92e43f2d0c4ec1507b6aa2d032a715f0350cbe7..02196db26a0842c7746cce601ca22057c11031fe 100644 (file)
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -814,6 +814,7 @@ void kvm_set_cpu_caps(void)
 
        kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
                F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ |
+               F(VERW_CLEAR) |
                F(NULL_SEL_CLR_BASE) | F(AUTOIBRS) | 0 /* PrefetchCtlMsr */ |
                F(WRMSR_XX_BASE_NS)
        );
@@ -826,6 +827,10 @@ void kvm_set_cpu_caps(void)
                F(PERFMON_V2)
        );
 
+       kvm_cpu_cap_init_kvm_defined(CPUID_8000_0021_ECX,
+               F(TSA_SQ_NO) | F(TSA_L1_NO)
+       );
+
        /*
         * Synthesize "LFENCE is serializing" into the AMD-defined entry in
         * KVM's supported CPUID if the feature is reported as supported by the
@@ -1376,8 +1381,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
                break;
        case 0x80000021:
-               entry->ebx = entry->ecx = entry->edx = 0;
+               entry->ebx = entry->edx = 0;
                cpuid_entry_override(entry, CPUID_8000_0021_EAX);
+               cpuid_entry_override(entry, CPUID_8000_0021_ECX);
                break;
        /* AMD Extended Performance Monitoring and Debug */
        case 0x80000022: {

diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h
index 0d17d6b706396449b7412bf3e7a7509a9875f659..0ea847b82354115ccb5355c260885af0289c64ea 100644 (file)
--- a/arch/x86/kvm/reverse_cpuid.h
+++ b/arch/x86/kvm/reverse_cpuid.h
@@ -18,6 +18,7 @@ enum kvm_only_cpuid_leafs {
        CPUID_8000_0022_EAX,
        CPUID_7_2_EDX,
        CPUID_24_0_EBX,
+       CPUID_8000_0021_ECX,
        NR_KVM_CPU_CAPS,
 
        NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
@@ -68,6 +69,10 @@ enum kvm_only_cpuid_leafs {
 /* CPUID level 0x80000022 (EAX) */
 #define KVM_X86_FEATURE_PERFMON_V2     KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
 
+/* CPUID level 0x80000021 (ECX) */
+#define KVM_X86_FEATURE_TSA_SQ_NO      KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
+#define KVM_X86_FEATURE_TSA_L1_NO      KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
+
 struct cpuid_reg {
        u32 function;
        u32 index;
@@ -98,6 +103,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
        [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
        [CPUID_7_2_EDX]       = {         7, 2, CPUID_EDX},
        [CPUID_24_0_EBX]      = {      0x24, 0, CPUID_EBX},
+       [CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
 };
 
 /*
@@ -137,6 +143,8 @@ static __always_inline u32 __feature_translate(int x86_feature)
        KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
        KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
        KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
+       KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
+       KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
        default:
                return x86_feature;
        }