]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
staging: rtl8723bs: fix spelling mistakes in sdio_halinit.c
authorTomasz Unger <tomasz.unger@yahoo.pl>
Mon, 23 Feb 2026 11:40:53 +0000 (12:40 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 23 Feb 2026 15:24:13 +0000 (16:24 +0100)
Fix spelling mistakes in comments found by codespell:
 - gurantee => guarantee
 - ser => set (two occurrences)

Signed-off-by: Tomasz Unger <tomasz.unger@yahoo.pl>
Link: https://patch.msgid.link/20260223114053.67890-1-tomasz.unger@yahoo.pl
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8723bs/hal/sdio_halinit.c

index 861d5162de15dc4936e84fc043c6505f7118e9d6..e32f051ed4151f527a048f497349a8be40b2eddf 100644 (file)
@@ -388,7 +388,7 @@ static void _InitWMACSetting(struct adapter *padapter)
 
        /*  2010.09.08 hpfan */
        /*  Since ADF is removed from RCR, ps-poll will not be indicate to driver, */
-       /*  RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */
+       /*  RxFilterMap should mask ps-poll to guarantee AP mode can rx ps-poll. */
        value16 = 0x400;
        rtw_write16(padapter, REG_RXFLTMAP1, value16);
 
@@ -606,7 +606,7 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
                cpwm_orig = 0;
                rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig);
 
-               /* ser rpwm */
+               /* set rpwm */
                val8 = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1);
                val8 &= 0x80;
                val8 += 0x80;
@@ -901,7 +901,7 @@ u32 rtl8723bs_hal_deinit(struct adapter *padapter)
                                } while (cnt < 100 && (val8 != 0));
                                /* H2C done, enter 32k */
                                if (val8 == 0) {
-                                       /* ser rpwm to enter 32k */
+                                       /* set rpwm to enter 32k */
                                        val8 = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1);
                                        val8 += 0x80;
                                        val8 |= BIT(0);