--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "mt7981b.dtsi"
+
+/ {
+ model = "AlwayLink M01K43";
+ compatible = "alwaylink,m01k43", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ label-mac-device = &gmac0;
+ led-boot = &led_wan;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_blue;
+ led-upgrade = &led_status_blue;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@40000000 {
+ reg = <0 0x40000000 0 0x10000000>;
+ device_type = "memory";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+ debounce-interval = <20>;
+ };
+
+ button-reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ debounce-interval = <20>;
+ };
+
+ button-rfkill {
+ label = "rfkill";
+ linux,code = <KEY_RFKILL>;
+ gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+ debounce-interval = <20>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_wan: led-wan {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_WAN;
+ gpios = <&pio 8 GPIO_ACTIVE_LOW>;
+ };
+
+ led-lan2 {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <2>;
+ gpios = <&pio 4 GPIO_ACTIVE_LOW>;
+ };
+
+ led-lan3 {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <3>;
+ gpios = <&pio 22 GPIO_ACTIVE_LOW>;
+ };
+
+ led_status_blue: led-status-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_status_red: led-status-red {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_STATUS;
+ function-enumerator = <1>;
+ gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-wifi {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_WLAN;
+ gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ led-signal-4g-yellow {
+ color = <LED_COLOR_ID_YELLOW>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <0>;
+ gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-signal-5g-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <1>;
+ gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-signal-5g-yellow {
+ color = <LED_COLOR_ID_YELLOW>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <2>;
+ gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-signal-4g-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <3>;
+ gpios = <&pio 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+ nvmem-cells = <&macaddr_ledeinfo_18 0>;
+ nvmem-cell-names = "mac-address";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+ };
+};
+
+&mdio_bus {
+ rtl8221b_phy: ethernet-phy@6 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <6>;
+ };
+
+ switch: switch@1f {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ phy-handle = <&swphy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ phy-handle = <&swphy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ phy-handle = <&swphy2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ phy-handle = <&swphy3>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ nvmem-cells = <&macaddr_ledeinfo_18 1>;
+ nvmem-cell-names = "mac-address";
+ phy-mode = "2500base-x";
+ phy-handle = <&rtl8221b_phy>;
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ swphy0: phy@0 {
+ reg = <0>;
+ };
+
+ swphy1: phy@1 {
+ reg = <1>;
+ };
+
+ swphy2: phy@2 {
+ reg = <2>;
+ };
+
+ swphy3: phy@3 {
+ reg = <3>;
+ };
+
+ };
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ubi";
+ reg = <0x0000000 0x3800000>;
+ };
+
+ partition@3800000 {
+ label = "ubi2";
+ reg = <0x3800000 0x3800000>;
+ };
+ };
+ };
+};
+
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_flash_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ factory: partition@50000 {
+ label = "factory";
+ reg = <0x050000 0x0b0000>;
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* WiFi EEPROM at offset 0x0, size 0x5000 */
+ eeprom_factory: eeprom@0 {
+ reg = <0x0 0x5000>;
+ };
+ };
+ };
+
+ partition@100000 {
+ label = "fip";
+ reg = <0x100000 0x200000>;
+ read-only;
+ };
+
+ partition@300000 {
+ label = "woem";
+ reg = <0x300000 0x010000>;
+ };
+
+ partition@310000 {
+ label = "ledeinfo";
+ reg = <0x310000 0x010000>;
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_ledeinfo_18: macaddr@18 {
+ compatible = "mac-base";
+ reg = <0x18 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+
+ partition@320000 {
+ label = "nvram";
+ reg = <0x320000 0x010000>;
+ };
+ };
+ };
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+
+ spi2_flash_pins: spi2-pins {
+ mux {
+ function = "spi";
+ groups = "spi2", "spi2_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&xhci {
+ phys = <&u2port0 PHY_TYPE_USB2>;
+ mediatek,u3p-dis-msk = <0x01>;
+ status = "okay";
+};
+
+&wifi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ nvmem-cells = <&eeprom_factory>;
+ nvmem-cell-names = "eeprom";
+
+ band@0 {
+ reg = <0>;
+ nvmem-cells = <&macaddr_ledeinfo_18 2>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ band@1 {
+ reg = <1>;
+ nvmem-cells = <&macaddr_ledeinfo_18 3>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
projects / thirdparty / openwrt.git / commitdiff
