4.9-stable patches

added patches:
	x86-tlb-drop-the-_gpl-from-the-cpu_tlbstate-export.patch

diff --git a/queue-4.9/series b/queue-4.9/series
index e384306bca71ef37427ef7e71bfeb93f4c9680a6..f0521905fbf7e8e9495822fbc67dc7de24ed4926 100644 (file)
--- a/queue-4.9/series
+++ b/queue-4.9/series
@@ -17,3 +17,4 @@ x86-microcode-amd-add-support-for-fam17h-microcode-loading.patch
 parisc-fix-alignment-of-pa_tlb_lock-in-assembly-on-32-bit-smp-kernel.patch
 parisc-qemu-idle-sleep-support.patch
 mtd-nand-pxa3xx-fix-readoob-implementation.patch
+x86-tlb-drop-the-_gpl-from-the-cpu_tlbstate-export.patch

diff --git a/queue-4.9/x86-tlb-drop-the-_gpl-from-the-cpu_tlbstate-export.patch b/queue-4.9/x86-tlb-drop-the-_gpl-from-the-cpu_tlbstate-export.patch
new file mode 100644 (file)
index 0000000..9d1ad97
--- /dev/null
+++ b/queue-4.9/x86-tlb-drop-the-_gpl-from-the-cpu_tlbstate-export.patch
@@ -0,0 +1,48 @@
+From 1e5476815fd7f98b888e01a0f9522b63085f96c9 Mon Sep 17 00:00:00 2001
+From: Thomas Gleixner <tglx@linutronix.de>
+Date: Thu, 4 Jan 2018 22:19:04 +0100
+Subject: x86/tlb: Drop the _GPL from the cpu_tlbstate export
+
+From: Thomas Gleixner <tglx@linutronix.de>
+
+commit 1e5476815fd7f98b888e01a0f9522b63085f96c9 upstream.
+
+The recent changes for PTI touch cpu_tlbstate from various tlb_flush
+inlines. cpu_tlbstate is exported as GPL symbol, so this causes a
+regression when building out of tree drivers for certain graphics cards.
+
+Aside of that the export was wrong since it was introduced as it should
+have been EXPORT_PER_CPU_SYMBOL_GPL().
+
+Use the correct PER_CPU export and drop the _GPL to restore the previous
+state which allows users to utilize the cards they payed for.
+
+As always I'm really thrilled to make this kind of change to support the
+#friends (or however the hot hashtag of today is spelled) from that closet
+sauce graphics corp.
+
+Fixes: 1e02ce4cccdc ("x86: Store a per-cpu shadow copy of CR4")
+Fixes: 6fd166aae78c ("x86/mm: Use/Fix PCID to optimize user/kernel switches")
+Reported-by: Kees Cook <keescook@google.com>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Andy Lutomirski <luto@kernel.org>
+Cc: Thomas Backlund <tmb@mageia.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/mm/init.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/x86/mm/init.c
++++ b/arch/x86/mm/init.c
+@@ -768,7 +768,7 @@ DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb
+       .state = 0,
+       .cr4 = ~0UL,    /* fail hard if we screw up cr4 shadow initialization */
+ };
+-EXPORT_SYMBOL_GPL(cpu_tlbstate);
++EXPORT_PER_CPU_SYMBOL(cpu_tlbstate);
+ 
+ void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
+ {