drm/hisilicon/hibmc: move display contrl config to hibmc_probe()

If there's no VGA output, this encoder modeset won't be called, which
will cause displaying data from GPU being cut off. It's actually a
common display config for DP and VGA, so move the vdac encoder modeset
to driver load stage.

Removed invalid bit configurations from `hibmc_display_ctrl`

Fixes: 5294967f4ae4 ("drm/hisilicon/hibmc: Add support for VDAC")
Signed-off-by: Lin He <helin52@huawei.com>
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20260509032302.2057227-4-shiyongbang@huawei.com

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 481e5e62c30bf116608806176ec8ee9b8ed80978..99b36de1fe1370702b42f4625bd33a24d1033d33 100644 (file)
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -215,6 +215,15 @@ void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
        writel(gate, mmio + gate_reg);
 }
 
+static void hibmc_display_ctrl(struct hibmc_drm_private *priv)
+{
+       u32 reg;
+
+       reg = readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE);
+       reg |= HIBMC_DISPLAY_CONTROL_PANELDATE(1);
+       writel(reg, priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE);
+}
+
 static void hibmc_hw_config(struct hibmc_drm_private *priv)
 {
        u32 reg;
@@ -246,6 +255,8 @@ static void hibmc_hw_config(struct hibmc_drm_private *priv)
        reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
 
        writel(reg, priv->mmio + HIBMC_MISC_CTRL);
+
+       hibmc_display_ctrl(priv);
 }
 
 static int hibmc_hw_map(struct hibmc_drm_private *priv)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
index 2fcfa3246fd1247b1fad5ff83575d59c7fd1d6b1..b9bd6d33fb0f7bae655a75858021d935b0c40cd3 100644 (file)
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
@@ -88,26 +88,6 @@ static const struct drm_connector_funcs hibmc_connector_funcs = {
        .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 };
 
-static void hibmc_encoder_mode_set(struct drm_encoder *encoder,
-                                  struct drm_display_mode *mode,
-                                  struct drm_display_mode *adj_mode)
-{
-       u32 reg;
-       struct drm_device *dev = encoder->dev;
-       struct hibmc_drm_private *priv = to_hibmc_drm_private(dev);
-
-       reg = readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE);
-       reg |= HIBMC_DISPLAY_CONTROL_FPVDDEN(1);
-       reg |= HIBMC_DISPLAY_CONTROL_PANELDATE(1);
-       reg |= HIBMC_DISPLAY_CONTROL_FPEN(1);
-       reg |= HIBMC_DISPLAY_CONTROL_VBIASEN(1);
-       writel(reg, priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE);
-}
-
-static const struct drm_encoder_helper_funcs hibmc_encoder_helper_funcs = {
-       .mode_set = hibmc_encoder_mode_set,
-};
-
 int hibmc_vdac_init(struct hibmc_drm_private *priv)
 {
        struct drm_device *dev = &priv->dev;
@@ -130,8 +110,6 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv)
                goto err;
        }
 
-       drm_encoder_helper_add(encoder, &hibmc_encoder_helper_funcs);
-
        ret = drm_connector_init_with_ddc(dev, connector,
                                          &hibmc_connector_funcs,
                                          DRM_MODE_CONNECTOR_VGA,