u32 data;
/* Clear bus lock condition */
- __ast_moutdwm(regs, 0x1e600000, 0xAEED1A03);
- __ast_moutdwm(regs, 0x1e600084, 0x00010000);
- __ast_moutdwm(regs, 0x1e600088, 0x00000000);
+ __ast_moutdwm(regs, AST_REG_AHBC00, AST_REG_AHBC00_PROTECT_KEY);
+ __ast_moutdwm(regs, AST_REG_AHBC84, 0x00010000);
+ __ast_moutdwm(regs, AST_REG_AHBC88, 0x00000000);
__ast_moutdwm(regs, 0x1e6e2000, 0x1688A8A8);
data = __ast_mindwm(regs, 0x1e6e2070);
#define AST_REG_P2A04 AST_REG_P2A(0xf004)
#define AST_REG_P2A04_BASE_MASK GENMASK(31, 16)
+/*
+ * AHB Controller (0x1e600000 - 0x1e61ffff)
+ */
+
+#define AST_REG_AHBC_BASE (0x1e600000)
+#define AST_REG_AHBC(__offset) (AST_REG_AHBC_BASE + (__offset))
+#define AST_REG_AHBC00 AST_REG_AHBC(0x00)
+#define AST_REG_AHBC00_PROTECT_KEY (0xaeed1a03)
+#define AST_REG_AHBC84 AST_REG_AHBC(0x84)
+#define AST_REG_AHBC88 AST_REG_AHBC(0x88)
+
#endif