]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/misc/aspeed_scu: Add AST1040 A0 silicon revision ID
authorJamin Lin <jamin_lin@aspeedtech.com>
Mon, 25 May 2026 05:30:44 +0000 (05:30 +0000)
committerCédric Le Goater <clg@redhat.com>
Tue, 26 May 2026 05:13:49 +0000 (07:13 +0200)
Add the AST1040 A0 silicon revision definition and register it
in the supported Aspeed silicon revision table.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260525053036.3305181-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
hw/misc/aspeed_scu.c
include/hw/misc/aspeed_scu.h

index 9d9f43e6b563b98649c0c0aeeee6ecc832bc0d16..c9b73a1148056f084ea62b171e428435d77ee9d1 100644 (file)
@@ -562,6 +562,7 @@ static uint32_t aspeed_silicon_revs[] = {
     AST1060_A2_SILICON_REV,
     AST2700_A1_SILICON_REV,
     AST2700_A2_SILICON_REV,
+    AST1040_A0_SILICON_REV,
 };
 
 bool is_supported_silicon_rev(uint32_t silicon_rev)
index d003955428a53277feb7df8a000349bc2861a69e..c30940ab7683a9e41ca8ed51481b91e71426b55f 100644 (file)
@@ -46,6 +46,7 @@ struct AspeedSCUState {
 #define AST2600_A3_SILICON_REV   0x05030303U
 #define AST1030_A1_SILICON_REV   0x80010000U
 #define AST1060_A2_SILICON_REV   0xA0030000U
+#define AST1040_A0_SILICON_REV   0x81000000U
 #define AST2700_A1_SILICON_REV   0x06010103U
 #define AST2700_A2_SILICON_REV   0x06020103U