#define TARGET_MCL_ONFAULT 4
#define TARGET_FORCE_SHMLBA
+#define TARGET_SYSMIPS_FLUSH_CACHE 3
static inline abi_ulong target_shmlba(CPUMIPSState *env)
{
#define TARGET_MCL_ONFAULT 4
#define TARGET_FORCE_SHMLBA
+#define TARGET_SYSMIPS_FLUSH_CACHE 3
static inline abi_ulong target_shmlba(CPUMIPSState *env)
{
}
}
+#ifdef TARGET_NR_sysmips
+static abi_long do_sysmips(CPUArchState *env, abi_long cmd, abi_long arg1,
+ abi_long arg2)
+{
+ switch (cmd) {
+ case TARGET_SYSMIPS_FLUSH_CACHE:
+ return 0;
+ default:
+ return -TARGET_EINVAL;
+ }
+}
+#endif
+
static abi_long do_prctl(CPUArchState *env, abi_long option, abi_long arg2,
abi_long arg3, abi_long arg4, abi_long arg5)
{
case TARGET_NR_prctl:
return do_prctl(cpu_env, arg1, arg2, arg3, arg4, arg5);
break;
+#ifdef TARGET_NR_sysmips
+ case TARGET_NR_sysmips:
+ return do_sysmips(cpu_env, arg1, arg2, arg3);
+#endif
#ifdef TARGET_NR_arch_prctl
case TARGET_NR_arch_prctl:
return do_arch_prctl(cpu_env, arg1, arg2);